Datasheet ACS37800 (Allegro) - 6

制造商Allegro
描述Isolated, Digital Output, Power Monitoring IC with Zero-Crossing Detection, Overcurrent and Overvoltage Flagging
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Isolated, Digital Output, Power Monitoring IC. ACS37800. with Zero-Crossing Detection, Overcurrent and Overvoltage Flagging

Isolated, Digital Output, Power Monitoring IC ACS37800 with Zero-Crossing Detection, Overcurrent and Overvoltage Flagging

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Isolated, Digital Output, Power Monitoring IC ACS37800 with Zero-Crossing Detection, Overcurrent and Overvoltage Flagging COMMON ELECTRICAL CHARACTERISTICS [1]:
Valid through the full range of TA and VCC = VCC(typ), unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Unit ELECTRICAL CHARACTERISTICS
5 V variant 4.5 5 5.5 V Supply Voltage VCC 3.3 V variant 2.97 3.3 3.63 V Supply Current I VCC(min) ≤ VCC ≤ VCC(max), no load on CC output pins – 12 15 mA Supply Bypass Capacitor CBYPASS VCC to GND recommended 0.1 – – mA Power-On Time tPO – 90 – µs
VOLTAGE INPUT BUFFER
Differential Input Range ΔVINR ΔVIN = VINP – VINN(GND) –250 – 250 mV Dynamic Input Frequency fdyn_in bypass_n_en = 0 35 – 300 Hz
VOLTAGE CHANNEL ADC
Sample Frequency fS_V – 32 – kHz Number of Bits ADCV_B – 16 – bits ADC Fullscale ADCV_FS ΔVIN = ±250 mV, VINN= GND –27500 – 27500 codes Sensitivity Sens(V) ΔVINR(min) < ΔVIN < ΔVINR(max) – 110 – LSB / mV PSE Ratio of change on VCC to change in V_O offset at DC, 100% ±10% V –7 – 7 codes / %V Voltage Channel Power Supply Error CC(typ) CC PSE Ratio of change on VCC to change in V_S sensitivity at DC, 100% ±10% V –0.1 – 0.1 % / %VCC CC(typ) PSRR Ratio of change on VCC to change in 60 70 – dB Voltage Channel Power Supply Rejection V_O offset, 10 Hz to 10 kHz, 10% VCC(pk-pk) Ratio PSRR Ratio of change on VCC to change in V_S sensitivity, 10 Hz to 10 kHz, 10% V 60 75 – dB CC(pk-pk)
VOLTAGE CHANNEL
Internal Bandwidth BW – 1 – kHz RMS Noise NV Input referred – ±0.3 – mV Linearity Error ELIN_V – ±0.2 – %
CURRENT CHANNEL
Sample Frequency fS_C – 32 – kHz Number of Bits ADCI_B – 16 – bits ADC Fullscale ADCI_FS IP = IPR(min) or IPR(max) –27500 – 27500 codes PSE Ratio of change on VCC to change in I_O offset at DC, 100% ±10% V –60 – 60 codes / %V Current Channel Power Supply Error CC(nom) CC PSE Ratio of change on VCC to change in I_S sensitivity at DC, 100% ±10% V –0.3 – 0.3 % / %VCC CC(nom) PSRR Ratio of change on VCC to change in 60 65 – dB Current Channel Power Supply Rejection I_O offset, 10 Hz to 10 kHz, 10% VCC(pk-pk) Ratio PSRR Ratio of change on VCC to change in I_S sensitivity, 10 Hz to 10 kHz, 10% V 20 40 – dB CC(pk-pk) Internal Bandwidth BW – 1 – kHz Primary Conductor Resistance RIP TA = 25°C – 0.85 – mΩ Continued on next page... 6 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Package Typical Application Selection Guide Absolute Maximum Ratings Isolation Characteristics ESD Ratings Thermal Characteristics Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics 15B5 Performance Characteristics 30B3 Performance Characteristics 90B3 Performance Characteristics I2C Operating Characteristics SPI Operating Characteristics Theory of Operation Introduction Voltage and Current Measurements Overcurrent Measurement Path Trim Methods Power Calculations Operational Block Diagram Configurable Settings Configuring the DIO Pins (I2C Devices) Configuring the Device for AC Applications Device EEPROM Settings Voltage Measurement Current Measurement Configuring the Device for DC Applications Device EEPROM Settings Voltage Measurement Current Measurement RMS and Power Accuracy vs. Operation Point RMS and Power Output Error vs. Applied Input 15B5 IRMS and Power Error 30B3 IRMS and Power Error 90B3 IRMS and Power Error Digital Communication Communication Interfaces SPI Registers and EEPROM EEPROM Error Checking and Correction (ECC) I2C Slave Adressing EEPROM/Shadow Memory Map Register Details – EEPROM Volatile Memory Map Register Details - Volatile Application Information Thermal Rise vs. Primary Current ASEK37800 Evaluation Board Layout Recommended PCB Layout Package Outline Drawing