Datasheet IM828-XCC (Infineon) - 6
| 制造商 | Infineon |
| 描述 | CIPOS Maxi IM828. The CIPOS Maxi IM828 product group offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs. |
| 页数 / 页 | 23 / 6 — CIPOS™ Maxi IM828. IM828-XCC. Pin configuration. VTH (Thermistor, Pin … |
| 修订版 | 02_00 |
| 文件格式/大小 | PDF / 1.3 Mb |
| 文件语言 | 英语 |
CIPOS™ Maxi IM828. IM828-XCC. Pin configuration. VTH (Thermistor, Pin 17). VB(U, V, W) and VS(U, V, W) (High side supplies,
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CIPOS™ Maxi IM828 IM828-XCC Pin configuration VTH (Thermistor, Pin 17) VB(U, V, W) and VS(U, V, W) (High side supplies,
The VTH pin provides direct access to the NTC,
Pin 1 - 6)
which is referenced to VSS. An external pull-up VB to VS is the high side supply voltage. The high side resistor connected to +5 V ensures that the resulting circuit can float with respect to VSS following the voltage can be directly connected to the external high side power device source voltage. microcontroller. Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap
ITRIP (Over current detection function, Pin 15)
circuit. IM828 provides an over current detection function by connecting the ITRIP input with the MOSFET The under-voltage detection operates with a rising drain current feedback. The ITRIP comparator supply threshold of typical VBSUV+ = 11.2 V and a threshold (typ. 0.5 V) is referenced to VSS ground. An falling threshold of VBSUV- = 10.2 V. input noise filter (tITRIP = typ. 500 ns) prevents the VS(U, V, W) provide a high robustness against driver to detect false over-current events. negative voltage in respect of VSS of -50 V transiently. Over current detection generates a shutdown of all This ensures very stable designs even under rough outputs of the gate driver after the shutdown conditions. propagation delay of typically 1µs.
NW, NV, NU (Low side source, Pin 18 - 20)
Fault-clear time is set to typical 1.1ms at RRCIN = 1 M The low side sources are available for current and CRCIN = 2 nF. measurements of each phase leg. It is recommended to keep the connection to pin VSS as
VDD, VSS (Low side control supply and
short as possible in order to avoid unnecessary
reference, Pin 13, 16)
inductive voltage drops. VDD is the control supply and it provides power both to input logic and to output power stage. Input logic
W, V, U (High side source and low side drain, Pin
is referenced to VSS ground.
21 - 23)
These pins are motor U, V, W input pins. The under-voltage circuit enables the device to operate at power on when a supply voltage of at
P (Positive bus input voltage, Pin 24)
least a typical voltage of VDDUV+ = 12.2 V is present. The IC shuts down all the gate drivers power outputs, The high side MOSFETs are connected to the bus when the VDD supply voltage is below V voltage. It is noted that the bus voltage does not DDUV- = 11.2 V. This prevents the external power switches from exceed 900 V. critically low gate voltage levels during on-state and therefore from excessive power dissipation. Datasheet 6 of 23 V 2.0 2020-09-03
The VTH pin provides direct access to the NTC,
Pin 1 - 6)
which is referenced to VSS. An external pull-up VB to VS is the high side supply voltage. The high side resistor connected to +5 V ensures that the resulting circuit can float with respect to VSS following the voltage can be directly connected to the external high side power device source voltage. microcontroller. Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap
ITRIP (Over current detection function, Pin 15)
circuit. IM828 provides an over current detection function by connecting the ITRIP input with the MOSFET The under-voltage detection operates with a rising drain current feedback. The ITRIP comparator supply threshold of typical VBSUV+ = 11.2 V and a threshold (typ. 0.5 V) is referenced to VSS ground. An falling threshold of VBSUV- = 10.2 V. input noise filter (tITRIP = typ. 500 ns) prevents the VS(U, V, W) provide a high robustness against driver to detect false over-current events. negative voltage in respect of VSS of -50 V transiently. Over current detection generates a shutdown of all This ensures very stable designs even under rough outputs of the gate driver after the shutdown conditions. propagation delay of typically 1µs.
NW, NV, NU (Low side source, Pin 18 - 20)
Fault-clear time is set to typical 1.1ms at RRCIN = 1 M The low side sources are available for current and CRCIN = 2 nF. measurements of each phase leg. It is recommended to keep the connection to pin VSS as
VDD, VSS (Low side control supply and
short as possible in order to avoid unnecessary
reference, Pin 13, 16)
inductive voltage drops. VDD is the control supply and it provides power both to input logic and to output power stage. Input logic
W, V, U (High side source and low side drain, Pin
is referenced to VSS ground.
21 - 23)
These pins are motor U, V, W input pins. The under-voltage circuit enables the device to operate at power on when a supply voltage of at
P (Positive bus input voltage, Pin 24)
least a typical voltage of VDDUV+ = 12.2 V is present. The IC shuts down all the gate drivers power outputs, The high side MOSFETs are connected to the bus when the VDD supply voltage is below V voltage. It is noted that the bus voltage does not DDUV- = 11.2 V. This prevents the external power switches from exceed 900 V. critically low gate voltage levels during on-state and therefore from excessive power dissipation. Datasheet 6 of 23 V 2.0 2020-09-03