Datasheet MC1488 (ON Semiconductor) - 6

制造商ON Semiconductor
描述Quad Line EIA-232D Driver
页数 / 页14 / 6 — MC1488. APPLICATIONS INFORMATION. Figure 15. Power Supply Protection. to …
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MC1488. APPLICATIONS INFORMATION. Figure 15. Power Supply Protection. to Meet Power Off Fault Conditions. Other Applications

MC1488 APPLICATIONS INFORMATION Figure 15 Power Supply Protection to Meet Power Off Fault Conditions Other Applications

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MC1488 APPLICATIONS INFORMATION
The Electronic Industries Association EIA−232D power supply designs, a loss of system power causes a low specification details the requirements for the interface impedance on the power supply outputs. When this occurs, between data processing equipment and data a low impedance to ground would exist at the power inputs communications equipment. This standard specifies not to the MC1488 effectively shorting the 300 W output only the number and type of interface leads, but also the resistors to ground. If all four outputs were then shorted to voltage levels to be used. The MC1488 quad driver and its plus or minus 15 V, the power dissipation in these resistors companion circuit, the MC1489 quad receiver, provide a would be excessive. Therefore, if the system is designed to complete interface system between DTL or TTL logic levels permit low impedances to ground at the power supplies of and the EIA−232D defined levels. The EIA−232D the drivers, a diode should be placed in each power supply requirements as applied to drivers are discussed herein. lead to prevent overheating in this fault condition. These two The required driver voltages are defined as between diodes, as shown in Figure 15, could be used to decouple all 5.0 and 15 V in magnitude and are positive for a Logic “0” the driver packages in a system. (These same diodes will and negative for a Logic “1.” These voltages are so defined allow the MC1488 to withstand momentary shorts to the when the drivers are terminated with a 3000 to 7000 W ±25 V limits specified in the earlier Standard EIA−232B.) resistor. The MC1488 meets this voltage requirement by The addition of the diodes also permits the MC1488 to converting a DTL/TTL logic level into EIA−232D levels withstand faults with power supplies of less than the 9.0 V with one stage of inversion. stated above. The EIA−232D specification further requires that during transitions, the driver output slew rate must not exceed 30 V per microsecond. The inherent slew rate of the VCC 14 14 14 MC1488 is much too fast for this requirement. The current MC1488 MC1488 MC1488 limited output of the device can be used to control this slew rate by connecting a capacitor to each driver output. The required capacitor can be easily determined by using the relationship C = IOS x DT/DV from which Figure 14 is derived. Accordingly, a 330 pF capacitor on each output will guarantee a worst case slew rate of 30 V per microsecond. 1000 7 1 7 1 7 1 VEE 100 μ 30 V/ms TE (V/s)
Figure 15. Power Supply Protection to Meet Power Off Fault Conditions
10 SLEW RA The maximum short circuit current allowable under 333 pF fault conditions is more than guaranteed by the previously mentioned 10 mA output current limiting. 1.0 1.0 10 100 1,000 10,000
Other Applications
C, CAPACITANCE (pF) The MC1488 is an extremely versatile line driver with a myriad of possible applications. Several features of the
Figure 14. Slew Rate versus Capacitance for I
drivers enhance this versatility:
SC = 10 mA
1. Output Current Limiting − this enables the circuit The interface driver is also required to withstand an designer to define the output voltage levels independent of accidental short to any other conductor in an power supplies and can be accomplished by diode interconnecting cable. The worst possible signal on any clamping of the output pins. Figure 16 shows the MC1488 conductor would be another driver using a plus or minus used as a DTL to MOS translator where the high level 15 V, 500 mA source. The MC1488 is designed to voltage output is clamped one diode above ground. The indefinitely withstand such a short to all four outputs in a resistor divider shown is used to reduce the output voltage package as long as the power supply voltages are greater below the 300 mV above ground MOS input level limit. than 9.0 V (i.e., VCC q 9.0 V; VEE p − 9.0 V). In some
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