Datasheet ADP1828 (Analog Devices) - 4

制造商Analog Devices
描述Synchronous Buck PWM, Step-Down, DC-to-DC Controller
页数 / 页33 / 4 — ADP1828. Data Sheet. Parameter. Test Conditions/Comments. Min Typ. Max. …
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ADP1828. Data Sheet. Parameter. Test Conditions/Comments. Min Typ. Max. Unit

ADP1828 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit

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ADP1828 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
OSCILLATOR Oscillator Frequency SYNC = FREQ = GND 240 300 360 kHz SYNC = GND, FREQ = VREG 480 600 720 kHz RFREQ = 57.6 kΩ 240 300 360 kHz RFREQ = 35.7 kΩ 370 450 530 kHz RFREQ = 24.9 kΩ 480 600 720 kHz SYNC Synchronization Range FREQ = GND 300 600 kHz FREQ = VREG 600 1200 kHz SYNC Input Pulse Width 200 ns SYNC Pin Capacitance 5 pF CURRENT SENSE CSL Threshold Voltage Relative to PGND −17 −38 −58 mV CSL Output Current CSL = PGND 42 50 56 μA Current Sense Blanking Period 100 ns GATE DRIVERS DH Rise Time CDH = 3 nF, VBST − VSW = 5 V 15 ns DH Fall Time CDH = 3 nF, VBST − VSW = 5 V 10 ns DL Rise Time CDL = 3 nF 15 ns DL Fall Time CDL = 3 nF 10 ns DH or DL Driver RON, Sourcing Current3, 4 Sourcing 1.5 A with a 0.1 µs pulse 2 Ω DH or DL Driver RON, Sinking Current3, 4 Sinking 1.5 A with a 0.1 µs pulse 1.5 Ω DH or DL Driver RON, Sourcing Current IN = VREG = 3 V; sourcing 1 A with a 0.1 µs pulse 2.3 Ω DH or DL Driver RON, Sinking Current IN = VREG = 3 V; sinking 1 A with a 0.1 µs pulse 2 Ω DH to DL, DL to DH Dead Time 40 ns CLOCK OUT CLOCKOUT Pulse Width 360 ns CLKOUT Rise or Fall Time CCLKOUT = 47 pF 10 ns SYNC to CLKOUT Propagation Delay, tPD CCLKOUT = 47 pF, CSYNC = 5 pF 40 ns SYNC to CLKOUT Propagation Delay, tPD CCLKOUT = 47 pF, CSYNC = 5 pF, IN < 5 V 52 ns LOGIC THRESHOLDS SYNC, CLKSET, FREQ Logic High 1.8 V SYNC, CLKSET Logic Low 0.4 V FREQ Logic Low 0.25 V CLKSET, SYNC, FREQ Input Leakage CLKSET, SYNC, FREQ = 0 V or VREG 1 μA Current EN Input Threshold 1.1 1.5 1.8 V EN Input Threshold Hysteresis 0.2 V EN Current Source EN = 0 V to 3.0 V −0.1 −0.6 −1.5 μA EN Input Impedance to 5 V Zener EN = 5.5 V to 20 V 100 kΩ THERMAL SHUTDOWN Thermal Shutdown Threshold4 145 °C Thermal Shutdown Hysteresis4 15 °C Rev. E | Page 4 of 33 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION SIMPLIFIED BLOCK DIAGRAM PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT POWER INTERNAL LINEAR REGULATOR SOFT START ERROR AMPLIFIER CURRENT-LIMIT SCHEME MOSFET DRIVERS SETTING THE OUTPUT VOLTAGE SWITCHING FREQUENCY CONTROL AND SYNCHRONIZATION COMPENSATION POWER-GOOD INDICATOR THERMAL SHUTDOWN SHUTDOWN CONTROL TRACKING APPLICATION INFORMATION SELECTING THE INPUT CAPACITOR OUTPUT LC FILTER SELECTING THE MOSFETS SETTING THE CURRENT LIMIT ACCURATE CURRENT-LIMIT SENSING FEEDBACK VOLTAGE DIVIDER COMPENSATING THE VOLTAGE MODE BUCK REGULATOR Type II Compensator Type III Compensator SOFT START SWITCHING NOISE AND OVERSHOOT REDUCTION VOLTAGE TRACKING COINCIDENT TRACKING RATIOMETRIC TRACKING THERMAL CONSIDERATIONS PCB LAYOUT GUIDELINE RECOMMENDED COMPONENT MANUFACTURERS APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE