Datasheet LTC7871 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Six-Phase, Synchronous Bidirectional Buck or Boost Controller |
| 页数 / 页 | 48 / 10 — PIN FUNCTIONS RUN (Pin 27):. V5 (Pin 9):. VFBHIGH (Pin 7):. DRVCC (Pin … |
| 文件格式/大小 | PDF / 1.4 Mb |
| 文件语言 | 英语 |
PIN FUNCTIONS RUN (Pin 27):. V5 (Pin 9):. VFBHIGH (Pin 7):. DRVCC (Pin 46):. VFB. LOW (Pin 3):. ITH. EXTVCC (Pin 42):
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文件文字版本
LTC7871
PIN FUNCTIONS RUN (Pin 27):
Enable Control Input. A voltage above
V5 (Pin 9):
Internal 5V Regulator Output. The control 1.22V turns on the IC. There is a 2µA pull-up current on circuits are powered from this voltage. Bypass this pin this pin. Once the RUN pin rises above the 1.22V thresh- to SGND with a minimum of 4.7µF low ESR tantalum or old, the pull-up current increases to 6µA. ceramic capacitor.
VFBHIGH (Pin 7):
VHIGH Voltage Sensing Error Amplifier
DRVCC (Pin 46):
Gate Driver Current Supply LDO Output. Noninverting Input. The voltage on this pin can be set to 5V, 8V, or 10V by
VFB
the DRVSET pin. Bypass this pin to ground plane with a
LOW (Pin 3):
VLOW Voltage Sensing Error Amplifier Inverting Input. minimum of 4.7μF low ESR tantalum or ceramic capacitor.
ITH EXTVCC (Pin 42):
External Power Input to an Internal LDO
HIGH/ITHLOW (Pins 6 and 4):
Current Control Threshold and Error Amplifier Compensation Point. The current com- Connected to DRVCC. This LDO supplies DRVCC power, parator’s threshold varies with the ITH control voltage. bypassing the internal LDO powered from VHIGH, when- ever EXTVCC is higher than its switchover threshold. Do
SS (Pin 1):
Soft-Start Input. The voltage ramp rate at this not exceed 60V on this pin. pin sets the voltage ramp rate of the regulated voltage. A capacitor to ground accomplishes soft-start. This pin has
ILIM (Pin 49):
Current Comparator Sense Voltage Limit a 1µA pull-up current. Selection Pin. The input impedance of this pin is 100kΩ.
MODE (Pin 51):
Mode Set Pin. Tying this pin to SGND
SNSD1+/SNSD2+/SNSD3+/SNSD4+/SNSD5+/SNSD6+
enables forced continuous mode in buck or boost modes.
(Pins 19, 20, 25, 56, 61, and 62):
DC Positive Current Floating this pin results in burst mode in buck mode and Sense Comparator Inputs. These inputs amplify the DC discontinuous mode in boost mode. Tying this pin to V5 portion of the current signal to the IC’s current compara- enables discontinuous mode in buck or boost modes. The tors and current sense amplifiers. input impedance of this pin is 90kΩ.
SNS1–/SNS2–/SNS3–/SNS4–/SNS5–/SNS6– (Pins 18, 21, SYNC (Pin 52):
Switching Frequency Synchronization
24, 57, 60, and 63):
Negative Current Sense Comparator or Spread Spectrum Set Pin. Applying an external clock Inputs. The negative input of the current comparator is between 60kHz to 750kHz to this pin causes the switch- normally connected to the VLOW. ing frequency to synchronize to the clock signal. If SYNC
SNSA1+/SNSA2+/SNSA3+/SNSA4+/SNSA5+/SNSA6+
is low, a resistor from the FREQ pin to SGND sets the
(Pins 17, 22, 23, 58, 59, and 64):
AC Positive Current switching frequency. Tying this pin to V5 allows switching Sense Comparator Inputs. These inputs amplify the AC frequency spread spectrum. This pin has a 250kΩ internal portion of the current signal to the IC’s current comparator. resistor to ground.
VHIGH (Pin 48):
Main VHIGH Supply. Bypass this pin to
FREQ (Pin 53):
Frequency Set Pin. A resistor between ground with a capacitor (0.1μF to 1μF). this pin and SGND sets the switching frequency. This pin
FAULT (Pin 35):
Fault Indicator Output. Open-drain output sources 20µA current. that pulls to ground during a fault condition.
DRVSET (Pin 44):
The voltage setting on this pin pro-
PGOOD (Pin 30):
Power Good Indictor Output for the grams the DRVCC output voltage. There are two internal Regulated V resistors, 200kΩ and 160kΩ, connecting this pin to the HIGH/VLOW. Open drain logic out that is pulled to ground when the regulated V V5 and SGND, respectively. HIGH/VLOW exceeds ±10% regulation window, after the internal 40µS power bad
CLKOUT (Pin 50):
Clock Output Pin. Use this pin to syn- mask timer expires. chronize multiple LTC7871 ICs. Signal swing is from V5 to ground. Rev. 0 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Serial Port Serial Port Register Details Typical Applications Package Description Typical Application Related Parts
PIN FUNCTIONS RUN (Pin 27):
Enable Control Input. A voltage above
V5 (Pin 9):
Internal 5V Regulator Output. The control 1.22V turns on the IC. There is a 2µA pull-up current on circuits are powered from this voltage. Bypass this pin this pin. Once the RUN pin rises above the 1.22V thresh- to SGND with a minimum of 4.7µF low ESR tantalum or old, the pull-up current increases to 6µA. ceramic capacitor.
VFBHIGH (Pin 7):
VHIGH Voltage Sensing Error Amplifier
DRVCC (Pin 46):
Gate Driver Current Supply LDO Output. Noninverting Input. The voltage on this pin can be set to 5V, 8V, or 10V by
VFB
the DRVSET pin. Bypass this pin to ground plane with a
LOW (Pin 3):
VLOW Voltage Sensing Error Amplifier Inverting Input. minimum of 4.7μF low ESR tantalum or ceramic capacitor.
ITH EXTVCC (Pin 42):
External Power Input to an Internal LDO
HIGH/ITHLOW (Pins 6 and 4):
Current Control Threshold and Error Amplifier Compensation Point. The current com- Connected to DRVCC. This LDO supplies DRVCC power, parator’s threshold varies with the ITH control voltage. bypassing the internal LDO powered from VHIGH, when- ever EXTVCC is higher than its switchover threshold. Do
SS (Pin 1):
Soft-Start Input. The voltage ramp rate at this not exceed 60V on this pin. pin sets the voltage ramp rate of the regulated voltage. A capacitor to ground accomplishes soft-start. This pin has
ILIM (Pin 49):
Current Comparator Sense Voltage Limit a 1µA pull-up current. Selection Pin. The input impedance of this pin is 100kΩ.
MODE (Pin 51):
Mode Set Pin. Tying this pin to SGND
SNSD1+/SNSD2+/SNSD3+/SNSD4+/SNSD5+/SNSD6+
enables forced continuous mode in buck or boost modes.
(Pins 19, 20, 25, 56, 61, and 62):
DC Positive Current Floating this pin results in burst mode in buck mode and Sense Comparator Inputs. These inputs amplify the DC discontinuous mode in boost mode. Tying this pin to V5 portion of the current signal to the IC’s current compara- enables discontinuous mode in buck or boost modes. The tors and current sense amplifiers. input impedance of this pin is 90kΩ.
SNS1–/SNS2–/SNS3–/SNS4–/SNS5–/SNS6– (Pins 18, 21, SYNC (Pin 52):
Switching Frequency Synchronization
24, 57, 60, and 63):
Negative Current Sense Comparator or Spread Spectrum Set Pin. Applying an external clock Inputs. The negative input of the current comparator is between 60kHz to 750kHz to this pin causes the switch- normally connected to the VLOW. ing frequency to synchronize to the clock signal. If SYNC
SNSA1+/SNSA2+/SNSA3+/SNSA4+/SNSA5+/SNSA6+
is low, a resistor from the FREQ pin to SGND sets the
(Pins 17, 22, 23, 58, 59, and 64):
AC Positive Current switching frequency. Tying this pin to V5 allows switching Sense Comparator Inputs. These inputs amplify the AC frequency spread spectrum. This pin has a 250kΩ internal portion of the current signal to the IC’s current comparator. resistor to ground.
VHIGH (Pin 48):
Main VHIGH Supply. Bypass this pin to
FREQ (Pin 53):
Frequency Set Pin. A resistor between ground with a capacitor (0.1μF to 1μF). this pin and SGND sets the switching frequency. This pin
FAULT (Pin 35):
Fault Indicator Output. Open-drain output sources 20µA current. that pulls to ground during a fault condition.
DRVSET (Pin 44):
The voltage setting on this pin pro-
PGOOD (Pin 30):
Power Good Indictor Output for the grams the DRVCC output voltage. There are two internal Regulated V resistors, 200kΩ and 160kΩ, connecting this pin to the HIGH/VLOW. Open drain logic out that is pulled to ground when the regulated V V5 and SGND, respectively. HIGH/VLOW exceeds ±10% regulation window, after the internal 40µS power bad
CLKOUT (Pin 50):
Clock Output Pin. Use this pin to syn- mask timer expires. chronize multiple LTC7871 ICs. Signal swing is from V5 to ground. Rev. 0 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Serial Port Serial Port Register Details Typical Applications Package Description Typical Application Related Parts