Datasheet LTC6226, LTC6227 (Analog Devices) - 25
| 制造商 | Analog Devices |
| 描述 | 1nV/√Hz 420MHz GBW, 180V/µs, Low Distortion Rail-to-Rail Output Op Amps |
| 页数 / 页 | 28 / 25 — PACKAGE DESCRIPTION. DC6 Package. 6-Lead Plastic DFN (2mm. 2mm) |
| 文件格式/大小 | PDF / 2.3 Mb |
| 文件语言 | 英语 |
PACKAGE DESCRIPTION. DC6 Package. 6-Lead Plastic DFN (2mm. 2mm)
该数据表的模型线
文件文字版本
LTC6226/LTC6227
PACKAGE DESCRIPTION DC6 Package 6-Lead Plastic DFN (2mm
×
2mm)
(Reference LTC DWG # 05-08-1703 Rev C) 0.70 ±0.05 2.55 ±0.05 0.60 ±0.10 1.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 1.37 ±0.10 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.125 0.40 ±0.10 TYP 0.60 ±0.10 4 6 (2 SIDES) 2.00 ±0.10 PIN 1 NOTCH (4 SIDES) PIN 1 BAR R = 0.20 OR TOP MARK 0.25 × 45° (SEE NOTE 6) CHAMFER R = 0.05 (DC6) DFN REV C 0915 TYP 3 1 0.25 ±0.05 0.200 REF 0.75 ±0.05 0.50 BSC 1.37 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev 0 For more information www.analog.com 25 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics (VS = ±5V) Electrical Characteristics (VS = 5V, 0V) Electrical Characteristics (VS = 3V, 0V) Typical Performance Characteristics Pin Functions Applications Information Typical Applications Package Description Typical Application Related Parts
PACKAGE DESCRIPTION DC6 Package 6-Lead Plastic DFN (2mm
×
2mm)
(Reference LTC DWG # 05-08-1703 Rev C) 0.70 ±0.05 2.55 ±0.05 0.60 ±0.10 1.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 1.37 ±0.10 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.125 0.40 ±0.10 TYP 0.60 ±0.10 4 6 (2 SIDES) 2.00 ±0.10 PIN 1 NOTCH (4 SIDES) PIN 1 BAR R = 0.20 OR TOP MARK 0.25 × 45° (SEE NOTE 6) CHAMFER R = 0.05 (DC6) DFN REV C 0915 TYP 3 1 0.25 ±0.05 0.200 REF 0.75 ±0.05 0.50 BSC 1.37 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev 0 For more information www.analog.com 25 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics (VS = ±5V) Electrical Characteristics (VS = 5V, 0V) Electrical Characteristics (VS = 3V, 0V) Typical Performance Characteristics Pin Functions Applications Information Typical Applications Package Description Typical Application Related Parts