Datasheet ADP121 (Analog Devices) - 3

制造商Analog Devices
描述150 mA, Low Quiescent Current, CMOS Linear Regulator
页数 / 页20 / 3 — Data Sheet. ADP121. SPECIFICATIONS. Table 1. Parameter. Symbol. …
修订版G
文件格式/大小PDF / 677 Kb
文件语言英语

Data Sheet. ADP121. SPECIFICATIONS. Table 1. Parameter. Symbol. Conditions. Min. Typ. Max. Unit

Data Sheet ADP121 SPECIFICATIONS Table 1 Parameter Symbol Conditions Min Typ Max Unit

该数据表的模型线

文件文字版本

link to page 4 link to page 4 link to page 4 link to page 4
Data Sheet ADP121 SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.3 V, whichever is greater; EN = VIN; IOUT = 10 mA; CIN = COUT = 1 µF; TA = 25°C, unless otherwise noted.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
INPUT VOLTAGE RANGE V T = −40°C to +125°C 2.3 IN J

5.5 V OPERATING SUPPLY CURRENT I I = 0 µA 11 µA GND OUT I = 0 µA, T = −40°C to +125°C 21 µA OUT J I = 10 mA 15 µA OUT I = 10 mA, T = −40°C to +125°C 29 µA OUT J I = 150 mA 30 µA OUT I = 150 mA, T = −40°C to +125°C 40 µA OUT J SHUTDOWN CURRENT I EN = GND 0.1 µA GND-SD EN = GND, T = −40°C to +125°C 1.5 µA J FIXED OUTPUT VOLTAGE ACCURACY V I = 10 mA −1 +1 % OUT OUT 100 µA < I < 150 mA, −2 +2 % OUT V = (V + 0.5 V) to 5.5 V IN OUT 100 µA < I < 150 mA, −3 +3 % OUT V = (V + 0.5 V) to 5.5 V IN OUT T = −40°C to +125°C J REGULATION Line Regulation ∆V /∆V V = (V + 0.5 V) to 5.5 V, I = 1 mA −0.03 +0.03 %/V OUT IN IN OUT OUT T = −40°C to +125°C J Load Regulation1 ∆V /∆I I = 1 mA to 150 mA 0.001 %/mA OUT OUT OUT I = 1 mA to 150 mA 0.005 %/mA OUT T = −40°C to +125°C J DROPOUT VOLTAGE2 V V = 3.3 V DROPOUT OUT TSOT I = 10 mA 8 mV OUT I = 10 mA, T = −40°C to +125°C 12 mV OUT J I = 150 mA 120 mV OUT I = 150 mA, T = −40°C to +125°C 180 mV OUT J WLCSP I = 10 mA 6 mV OUT I = 10 mA, T = −40°C to +125°C 9 mV OUT J I = 150 mA 90 mV OUT I = 150 mA, T = −40°C to +125°C 135 mV OUT J START-UP TIME3 T V = 3.3 V 120 µs START-UP OUT CURRENT-LIMIT THRESHOLD4 I 160 225 350 mA LIMIT THERMAL SHUTDOWN Thermal Shutdown Threshold TS T rising 150 °C SD J Thermal Shutdown Hysteresis TS 15 °C SD-HYS EN INPUT EN Input Logic High V 2.3 V ≤ V ≤ 5.5 V 1.2 V IH IN EN Input Logic Low V 2.3 V ≤ V ≤ 5.5 V 0.4 V IL IN EN Input Leakage Current V EN = VIN or GND 0.05 µA I-LEAKAGE EN = VIN or GND, T = −40°C to +125°C 1 J UNDERVOLTAGE LOCKOUT UVLO Input Voltage Rising UVLO 2.25 V RISE Input Voltage Falling UVLO 1.5 V FALL Hysteresis UVLO 120 mV HYS OUTPUT NOISE OUT 10 Hz to 100 kHz, V = 5 V, V = 3.3 V 65 µV rms NOISE IN OUT 10 Hz to 100 kHz, V = 5 V, V = 2.5 V 52 µV rms IN OUT 10 Hz to 100 kHz, V = 5 V, V = 1.2 V 40 µV rms IN OUT Rev. G | Page 3 of 20 Document Outline Features Applications Typical Application Circuits General Description Revision History Specifications Recommended Specifications: Input and Output Capacitors Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Undervoltage Lockout Enable Feature Current Limit and Thermal Overload Protection Thermal Considerations PCB Layout Considerations Outline Dimensions Ordering Guide