Datasheet ADP220, ADP221 (Analog Devices) - 3

制造商Analog Devices
描述Dual, 200 mA, Low Noise, High PSRR Voltage Regulator
页数 / 页20 / 3 — Data Sheet. ADP220/ADP221. SPECIFICATIONS. Table 1. Parameter. Symbol. …
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Data Sheet. ADP220/ADP221. SPECIFICATIONS. Table 1. Parameter. Symbol. Conditions. Min. Typ. Max. Unit

Data Sheet ADP220/ADP221 SPECIFICATIONS Table 1 Parameter Symbol Conditions Min Typ Max Unit

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Data Sheet ADP220/ADP221 SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.5 V (whichever is greater), EN1 = EN2 = VIN, IOUT1 = IOUT2 = 10 mA, CIN = COUT1 = COUT2 = 1 µF, TA = 25°C, unless otherwise noted.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
INPUT VOLTAGE RANGE VIN TJ = −40°C to +125°C 2.5 5.5 V OPERATING SUPPLY CURRENT WITH IGND IOUT = 0 µA 60 µA BOTH REGULATORS ON IOUT = 0 µA, TJ = −40°C to +125°C 120 µA IOUT = 10 mA 70 µA IOUT = 10 mA, TJ = −40°C to +125°C 140 µA IOUT = 200 mA 120 µA IOUT = 200 mA, TJ = −40°C to +125°C 220 µA SHUTDOWN CURRENT IGND-SD EN1= EN2 = GND 0.1 µA EN1= EN2 = GND, TJ = −40°C to +125°C 2 µA FIXED OUTPUT VOLTAGE ACCURACY VOUT −1 +1 % 100 µA < IOUT < 200 mA, VIN = (VOUT + 0.5 V) to −2 +2 % 5.5 V, TJ = −40°C to +125°C LINE REGULATION ∆VOUT/∆VIN VIN = (VOUT + 0.5 V) to 5.5 V 0.01 %/V VIN = (VOUT + 0.5 V) to 5.5 V, TJ = −40°C to +125°C −0.03 +0.03 %/V LOAD REGULATION1 ∆VOUT/∆IOUT IOUT = 1 mA to 200 mA 0.001 %/mA IOUT = 1 mA to 200 mA, TJ = −40°C to +125°C 0.003 %/mA DROPOUT VOLTAGE2 VDROPOUT VOUT = 3.3 V mV IOUT = 10 mA 7.5 mV IOUT = 10 mA, TJ = −40°C to +125°C 12 mV IOUT = 200 mA 150 mV IOUT = 200 mA, TJ = −40°C to +125°C 230 mV START-UP TIME3 tSTART-UP VOUT = 3.3 V, both initially off, enable one 240 µs VOUT = 0.8 V, both initially off, enable one 100 µs VOUT = 3.3 V, one initially on, enable second 180 µs VOUT = 0.8 V, one initially on, enable second 20 µs ACTIVE PULL-DOWN RESISTANCE tSHUTDOWN VOUT = 2.8 V, RLOAD = ∞, COUT = 1 μF, ADP221 only 80 Ω CURRENT-LIMIT THRESHOLD4 ILIMIT 240 300 440 mA THERMAL SHUTDOWN Thermal Shutdown Threshold TSSD TJ rising 155 °C Thermal Shutdown Hysteresis TSSD-HYS 15 °C EN INPUT EN Input Logic High VIH 2.5 V ≤ VIN ≤ 5.5 V 1.2 V EN Input Logic Low VIL 2.5 V ≤ VIN ≤ 5.5 V 0.4 V EN Input Leakage Current VI-LEAKAGE EN1 = EN2 = VIN or GND 0.1 µA EN1 = EN2 = VIN or GND, TJ = −40°C to +125°C 1 µA UNDERVOLTAGE LOCKOUT UVLO Input Voltage Rising UVLORISE 2.45 V Input Voltage Falling UVLOFALL 2.2 2.35 V Hysteresis UVLOHYS 100 mV OUTPUT NOISE OUTNOISE 10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V 56 µV rms 10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.8 V 50 µV rms 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 2.5 V 45 µV rms 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 1.2 V 27 µV rms Rev. H | Page 3 of 20 Document Outline Features Applications Typical Application Circuits General Description Table of Contents Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Undervoltage Lockout Enable Feature Current-Limit and Thermal Overload Protection Thermal Considerations Printed Circuit Board (PCB) Layout Considerations Outline Dimensions Ordering Guide