Datasheet ADP165, ADP166 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Very Low Quiescent Current, 150 mA, LDO Regulator |
| 页数 / 页 | 23 / 5 — Data Sheet. ADP165/ADP166. ABSOLUTE MAXIMUM RATINGS. Table 3. Parameter. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 613 Kb |
| 文件语言 | 英语 |
Data Sheet. ADP165/ADP166. ABSOLUTE MAXIMUM RATINGS. Table 3. Parameter. Rating. THERMAL DATA. THERMAL RESISTANCE
该数据表的模型线
- ADP165ACBZ-1.2-R7 ADP165ACBZ-1.8-R7 ADP165ACBZ-2.2-R7 ADP165ACBZ-2.3-R7 ADP165ACBZ-2.85-R7 ADP165ACBZ-3.0-R7 ADP165ACBZ-3.3-R7 ADP165ACPZN-1.2-R7 ADP165ACPZN-1.8-R7 ADP165ACPZN-2.3-R7 ADP165ACPZN-3.0-R7 ADP165ACPZN-3.3-R7 ADP165ACPZN-R7 ADP165AUJZ-1.2-R7 ADP165AUJZ-1.8-R7 ADP165AUJZ-2.3-R7 ADP165AUJZ-3.0-R7 ADP165AUJZ-3.3-R7 ADP165AUJZ-R7
- ADP166ACBZ-1.2-R7 ADP166ACBZ-1.8-R7 ADP166ACBZ-2.2-R7 ADP166ACBZ-2.3-R7 ADP166ACBZ-2.85-R7 ADP166ACBZ-3.0-R7 ADP166ACBZ-3.3-R7 ADP166ACPZN-1.2-R7 ADP166ACPZN-1.8-R7 ADP166ACPZN-2.3-R7 ADP166ACPZN-3.0-R7 ADP166ACPZN-3.3-R7 ADP166ACPZN-R7 ADP166AUJZ-1.2-R7 ADP166AUJZ-1.8-R7 ADP166AUJZ-2.3-R7 ADP166AUJZ-3.0-R7 ADP166AUJZ-3.3-R7 ADP166AUJZ-R7
文件文字版本
Data Sheet ADP165/ADP166 ABSOLUTE MAXIMUM RATINGS
Junction-to-ambient thermal resistance (θJA) of the package is
Table 3.
based on modeling and calculation using a 4-layer board. The
Parameter Rating
junction-to-ambient thermal resistance is highly dependent on the VIN to GND −0.3 V to +6.5 V application and board layout. In applications where high maximum VOUT to GND −0.3 V to VIN power dissipation exists, close attention to thermal board design EN to GND −0.3 V to VIN is required. The value of θJA may vary, depending on PCB material, ADJ to GND −0.3 V to VIN layout, and environmental conditions. The specified values of NC to GND −0.3 V to VIN θJA are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer Storage Temperature Range −65°C to +150°C to JESD 51-7 and JESD 51-9 for detailed information on the Operating Junction Temperature Range −40°C to +125°C board construction. Operating Ambient Temperature Range −40°C to +125°C Ψ Soldering Conditions JEDEC J-STD-020 JB is the junction to board thermal characterization parameter with units of °C/W. ΨJB of the package is based on modeling and Stresses at or above those listed under Absolute Maximum calculation using a 4-layer board. The JESD51-12, Guidelines for Ratings may cause permanent damage to the product. This is a Reporting and Using Electronic Package Thermal Information, stress rating only; functional operation of the product at these states that thermal characterization parameters are not the same or any other conditions above those indicated in the operational as thermal resistances. ΨJB measures the component power flowing section of this specification is not implied. Operation beyond through multiple thermal paths rather than a single path as in the maximum operating conditions for extended periods may thermal resistance (θJB). Therefore, ΨJB thermal paths include affect product reliability. convection from the top of the package as well as radiation from
THERMAL DATA
the package, factors that make ΨJB more useful in real-world applications. Maximum TJ is calculated from the board Absolute maximum ratings only apply individually; they do not temperature (TB) and PD using the formula apply in combination. The ADP165/ADP166 can be damaged T when the junction temperature limits are exceeded. Monitoring J = TB + (PD × ΨJB) ambient temperature does not guarantee that the junction Refer to JESD51-8 and JESD51-12 for more detailed information temperature (T about Ψ J) is within the specified temperature limits. In JB. applications with high power dissipation and poor thermal
THERMAL RESISTANCE
resistance, the maximum ambient temperature may have to be derated. θJA and ΨJB are specified for worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. In applications with moderate power dissipation and low printed circuit board (PCB) thermal resistance, the maximum ambient
Table 4. Thermal Resistance
temperature can exceed the maximum limit as long as the junction
Package Type θJA ΨJB Unit
temperature is within specification limits. TJ is dependent on 5-Lead TSOT 170 43 °C/W the ambient temperature (TA), the power dissipation of the 6-Lead LFCSP 50.2 18.2 °C/W device (PD), and the junction-to-ambient thermal resistance of 4-Ball, 0.4 mm Pitch WLCSP 260 58 °C/W the package (θJA). Maximum TJ is calculated from TA and PD using the formula
ESD CAUTION
TJ = TA + (PD × θJA) Rev. A | Page 5 of 23 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITORS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor, COUT Input Bypass Capacitor, CIN Input and Output Capacitor Properties ENABLE FEATURE UNDERVOLTAGE LOCKOUT (UVLO) CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS LIGHT SENSITIVITY OF WLCSPs OUTLINE DIMENSIONS ORDERING GUIDE
Junction-to-ambient thermal resistance (θJA) of the package is
Table 3.
based on modeling and calculation using a 4-layer board. The
Parameter Rating
junction-to-ambient thermal resistance is highly dependent on the VIN to GND −0.3 V to +6.5 V application and board layout. In applications where high maximum VOUT to GND −0.3 V to VIN power dissipation exists, close attention to thermal board design EN to GND −0.3 V to VIN is required. The value of θJA may vary, depending on PCB material, ADJ to GND −0.3 V to VIN layout, and environmental conditions. The specified values of NC to GND −0.3 V to VIN θJA are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer Storage Temperature Range −65°C to +150°C to JESD 51-7 and JESD 51-9 for detailed information on the Operating Junction Temperature Range −40°C to +125°C board construction. Operating Ambient Temperature Range −40°C to +125°C Ψ Soldering Conditions JEDEC J-STD-020 JB is the junction to board thermal characterization parameter with units of °C/W. ΨJB of the package is based on modeling and Stresses at or above those listed under Absolute Maximum calculation using a 4-layer board. The JESD51-12, Guidelines for Ratings may cause permanent damage to the product. This is a Reporting and Using Electronic Package Thermal Information, stress rating only; functional operation of the product at these states that thermal characterization parameters are not the same or any other conditions above those indicated in the operational as thermal resistances. ΨJB measures the component power flowing section of this specification is not implied. Operation beyond through multiple thermal paths rather than a single path as in the maximum operating conditions for extended periods may thermal resistance (θJB). Therefore, ΨJB thermal paths include affect product reliability. convection from the top of the package as well as radiation from
THERMAL DATA
the package, factors that make ΨJB more useful in real-world applications. Maximum TJ is calculated from the board Absolute maximum ratings only apply individually; they do not temperature (TB) and PD using the formula apply in combination. The ADP165/ADP166 can be damaged T when the junction temperature limits are exceeded. Monitoring J = TB + (PD × ΨJB) ambient temperature does not guarantee that the junction Refer to JESD51-8 and JESD51-12 for more detailed information temperature (T about Ψ J) is within the specified temperature limits. In JB. applications with high power dissipation and poor thermal
THERMAL RESISTANCE
resistance, the maximum ambient temperature may have to be derated. θJA and ΨJB are specified for worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. In applications with moderate power dissipation and low printed circuit board (PCB) thermal resistance, the maximum ambient
Table 4. Thermal Resistance
temperature can exceed the maximum limit as long as the junction
Package Type θJA ΨJB Unit
temperature is within specification limits. TJ is dependent on 5-Lead TSOT 170 43 °C/W the ambient temperature (TA), the power dissipation of the 6-Lead LFCSP 50.2 18.2 °C/W device (PD), and the junction-to-ambient thermal resistance of 4-Ball, 0.4 mm Pitch WLCSP 260 58 °C/W the package (θJA). Maximum TJ is calculated from TA and PD using the formula
ESD CAUTION
TJ = TA + (PD × θJA) Rev. A | Page 5 of 23 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITORS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor, COUT Input Bypass Capacitor, CIN Input and Output Capacitor Properties ENABLE FEATURE UNDERVOLTAGE LOCKOUT (UVLO) CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS LIGHT SENSITIVITY OF WLCSPs OUTLINE DIMENSIONS ORDERING GUIDE