Datasheet ADP7158 (Analog Devices) - 18

link to page 18 link to page 18 link to page 18 link to page 18 link to page 19
ADP7158 Data Sheet
Table 7 shows the typical θ
140
JA values of the 8-lead SOIC and 10-lead LFCSP packages for various PCB copper sizes. Table 8
120
shows the typical ΨJB values of the 8-lead SOIC and 10-lead LFCSP.
°C) ( 100 URE Table 7. Typical θJA Values RAT 80 E θ P JA (°C/W) M E Copper Size (mm2) 10-Lead LFCSP 8-Lead SOIC 60 N T
251 130.2 123.8
IO 40 6400mm2
100 93.0 90.4
500mm2 JUNCT
500 65.8 66.0
25mm2 20 TJ MAX
1000 55.6 56.6 056 6400 44.1 45.5
0
12896-
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 TOTAL POWER DISSIPATION (W)
1 Device soldered to minimum size pin traces. Figure 54. Junction Temperature vs. Total Power Dissipation for
Table 8. Typical Ψ
the 10-Lead LFCSP, T
JB Values
A = 25°C
Package ΨJB (°C/W) 140
10-Lead LFCSP 29.1 8-Lead SOIC 30.1
120 °C)
Calculate the junction temperature (T
(
J) of the ADP7158 from
100
the following equation:
URE RAT
T
E
J = TA + (PD × θJA) (2)
P 80 M E
where:
N T
T
IO 60
A is the ambient temperature.
6400mm2
PD is the power dissipation in the die, given by
500mm2 JUNCT 40 25mm2
PD = ((VIN − VOUT) × ILOAD) + (VIN × IGND) (3)
TJ MAX
057 where:
20
12896- V
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
IN and VOUT are the input and output voltages, respectively.
TOTAL POWER DISSIPATION (W)
I LOAD is the load current. Figure 55. Junction Temperature vs. Total Power Dissipation for IGND is the ground current. the 10-Lead LFCSP, TA = 50°C Power dissipation caused by ground current is quite small and
130
can be ignored. Therefore, the junction temperature equation
125
simplifies to the following:
120 °C)
T
(
J = TA + (((VIN − VOUT) × ILOAD) × θJA) (4)
115 URE
As shown in Equation 4, for a given ambient temperature, input
110 RAT
to output voltage differential, and continuous load current, a
E P M 105
minimum copper size requirement exists for the PCB to ensure
E 100
that the junction temperature does not rise above 125°C.
N T IO 6400mm2 95 500mm2
The heat dissipation from the package can be improved by increas-
25mm2 JUNCT 90
ing the amount of copper attached to the pins and exposed pad
TJ MAX
of the ADP7158. Adding thermal planes underneath the package
85
058 also improves thermal performance. However, as shown in Table 7, 12896-
80 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
a point of diminishing returns is eventually reached, beyond
TOTAL POWER DISSIPATION (W)
which an increase in the copper area does not yield significant Figure 56. Junction Temperature vs. Total Power Dissipation for reduction in the junction to ambient thermal resistance. the 10-Lead LFCSP, TA = 85°C Figure 54 to Figure 59 show junction temperature calculations for various ambient temperatures, power dissipation, and areas of PCB copper. Rev. C | Page 18 of 22 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITORS, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties UVLO PROGRAMMABLE PRECISION ENABLE START-UP TIME REF, BYP, AND VREG PINS CURRENT LIMIT AND THERMAL SHUTDOWN THERMAL CONSIDERATIONS Thermal Characterization Parameter (ΨJB) PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE