Datasheet ADN8835 (Analog Devices) - 14

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ADN8835 Data Sheet
The Chopper 2 amplifier is used as a buffer for the external DAC, which controls the temperature setpoint. Connect the DAC to IN2P and short the IN2N and OUT2 pins together. See
ANALOG PID CONTROL
Figure 27 for an overview of how to configure the ADN8835 The ADN8835 integrates two self correcting, auto-zeroing external circuitry for digital PID control. amplifiers (Chopper 1 and Chopper 2). The Chopper 1 amplifier
POWERING THE CONTROLLER
takes a thermal sensor input and converts or regulates the input to a linear voltage output. The OUT1 voltage is proportional to the The ADN8835 operates at an input voltage range of 2.7 V to object temperature. The OUT1 voltage is fed into the compensa- 5.5 V that is applied to the PVINS pins and PVINL pins. The tion amplifier (Chopper 2) and is compared with a temperature VDD pin is the input power for the driver and internal reference. setpoint voltage, which creates an error voltage that is propor- The PVINS and the PVINL input power pins are for the PWM tional to the difference. For autonomous analog temperature driver and the linear driver, respectively. Apply the same input control, Chopper 2 can implement a PID network as shown in voltage to al power input pins. In some circumstances, an RC Figure 26 to set the overal stability and response of the thermal low-pass filter can be added between the PVINS/PVINL and loop. Adjusting the PID network optimizes the step response of the VDD pins to prevent high frequency noise from entering the TEC control loop. A compromised settling time and the VDD, as shown in Figure 27. The capacitor and resistor values maximum current ringing become available when this are typical y 10 Ω and 0.1 µF, respectively. adjustment is done. To adjust the compensation network, see When configuring the power supply to the ADN8835, keep in the PID Compensation Amplifier (Chopper 2) section. mind that at high current loads, the input voltage may drop
DIGITAL PID CONTROL
substantial y due to a voltage drop on the wires between the front-end power supply and the PVINS and the PVINL pins. The ADN8835 can also be configured for use in a software Leave a proper voltage margin when designing the front-end control ed PID loop. In this scenario, the Chopper 1 amplifier power supply to maintain the performance. Minimize the trace can either be left unused or configured as a thermistor input length from the power supply to the PVINS and the PVINL amplifier connected to an external temperature measurement pins to help mitigate the voltage drop. analog-to-digital converter (ADC). For more information, see the Thermistor Amplifier (Chopper 1) section. If Chopper 1 is left unused, tie IN1N and IN1P to AGND.
ENABLE COOLING AND HEATING TEC CURRENT LIMITS 2.5V VREF RC1 RC2 TEC RV1 CVDD V 0.1µF IN VOLTAGE RBP 2.7V TO 5.5V LIMIT EN/SY ILIM TMPGD VDD 2.5V VREF VLIM/SD PVINL R PVINS CIN V2 10µF TEMPERATURE SET DAC IN2P TEC CURRENT READBACK ITEC LDR C TEC L_OUT TEC VOLTAGE READBACK VTEC ADN8835 0.1µF + 2.5V VREF PGNDL VREF – CVREF NTC R RA 0.1uF SFB RTH AGND L = 1µH IN1P SW C IN1N SW_OUT THERMISTOR OUT1 IN2N OUT2 PGNDS F 10µF SW = 2MHz R R X B 2.5V VREF RFB TEMPERATURE READBACK
027
ADC
14174- Figure 27. TEC Controller in a Digital Temperature Control Loop Rev. B | Page 14 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG PID CONTROL DIGITAL PID CONTROL POWERING THE CONTROLLER ENABLE AND SHUTDOWN OSCILLATOR CLOCK FREQUENCY External Clock Operation Connecting Multiple ADN8835 Devices TEMPERATURE LOCK INDICATOR SOFT START ON POWER-UP TEC VOLTAGE/CURRENT MONITOR Voltage Monitor Current Monitor MAXIMUM TEC VOLTAGE LIMIT Using a Resistor Divider to Set the TEC Voltage Limit MAXIMUM TEC CURRENT LIMIT Using a Resistor Divider to Set the TEC Current Limit APPLICATIONS INFORMATION SIGNAL FLOW THERMISTOR SETUP THERMISTOR AMPLIFIER (CHOPPER 1) PID COMPENSATION AMPLIFIER (CHOPPER 2) MOSFET DRIVER AMPLIFIERS PWM OUTPUT FILTER REQUIREMENTS Inductor Selection Capacitor Selection INPUT CAPACITOR SELECTION POWER DISSIPATION PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Losses (PSW) Transition Losses (PTRAN) Linear Regulator Power Dissipation THERMAL CONSIDERATION PCB LAYOUT GUIDELINES BLOCK DIAGRAMS AND SIGNAL FLOW GUIDELINES FOR REDUCING NOISE AND MINIMIZING POWER LOSS General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components EXAMPLE PCB LAYOUT USING TWO LAYERS OUTLINE DIMENSIONS ORDERING GUIDE