Datasheet AD9375 (Analog Devices) - 8

制造商Analog Devices
描述Integrated, Dual RF Transceiver with Observation Path
页数 / 页61 / 8 — AD9375. Data Sheet. Parameter. Symbol. Min. Typ. Max. Unit. Test …
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AD9375. Data Sheet. Parameter. Symbol. Min. Typ. Max. Unit. Test Conditions/Comments

AD9375 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments

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AD9375 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Input Second-Order Intercept IIP2 Maximum gain, IM2 1 MHz Point offset from LO, gain control limited to the first 20 steps 700 MHz LO 45 dBm 2600 MHz LO 45 dBm 3500 MHz LO 45 dBm Image Rejection After online tone calibration 700 MHz LO 75 dB 2600 MHz LO 75 dB 3500 MHz LO 75 dB Input Impedance 400 Ω Differential Tx1 to SnRx Signal and Tx2 to Applies to each SnRx input SnRx Signal Isolation 700 MHz LO 60 dB 2600 MHz LO 60 dB 3500 MHz LO 60 dB LO SYNTHESIZER LO Frequency Step 2.3 Hz 1.5 GHz to 3 GHz, 76.8 MHz phase frequency detector (PFD) frequency LO Spur −80 dBc Excludes integer boundary spurs 1 kHz to 100 MHz Spot Phase Noise 700 MHz LO 10 kHz −104 dBc 100 kHz −107 dBc 1 MHz −133 dBc 2600 MHz LO 10 kHz −93 dBc 100 kHz −97 dBc 1 MHz −123 dBc 3500 MHz LO 10 kHz −91 dBc 100 kHz −97 dBc 1 MHz −123 dBc 5500 MHz LO 10 kHz −98 dBc 100 kHz −100 dBc 1 MHz −110 dBc Integrated Phase Noise Integrated from 1 kHz to 100 MHz 700 MHz LO 0.20 °rms 2600 MHz LO 0.49 °rms 3500 MHz LO 0.55 °rms 5500 MHz LO 0.75 °rms EXTERNAL LO INPUT Input Frequency f 600 8000 MHz Input frequency must be 2× EXTLO the desired LO frequency Input Signal Power 0 3 6 dBm 50 Ω matching at the source Rev. 0 | Page 8 of 61 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Current and Power Consumption Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Reflow Profile Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 700 MHz Band 2.6 GHz Band 3.5 GHz Band 5.5 GHz Band Theory of Operation Transmitter (Tx) Receiver (Rx) Observation Receiver (ORx) Sniffer Receiver (SnRx) Clock Input Synthesizers RF PLL Clock PLL Serial Peripheral Interface (SPI) GPIO_x AND GPIO_3P3_x Pins Auxiliary Converters Auxiliary ADC Inputs (AUXADC_x) Auxiliary DACs (AUXDAC_x) JESD204B Data Interface Power Supply Sequence Digital Predistortion (DPD) JTAG Boundary Scan Outline Dimensions Ordering Guide