Datasheet AD2420(W), AD2426(W), AD2427(W), AD2428(W), AD2429(W) (Analog Devices) - 38
制造商 | Analog Devices |
描述 | Automotive Audio Bus A2B Transceiver |
页数 / 页 | 38 / 38 — AD2420(W). /AD2426(W). /AD2427(W). /AD2428(W). AD2429(W). ORDERING GUIDE. … |
修订版 | B |
文件格式/大小 | PDF / 2.1 Mb |
文件语言 | 英语 |
AD2420(W). /AD2426(W). /AD2427(W). /AD2428(W). AD2429(W). ORDERING GUIDE. Model1. Temperature Range2. Description. Package Option

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AD2420(W) /AD2426(W) /AD2427(W) /AD2428(W) / AD2429(W) ORDERING GUIDE Model1 Temperature Range2 Description Package Option
AD2420KCPZ 0°C to +70°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2420BCPZ –40°C to +85°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2426KCPZ 0°C to +70°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2426BCPZ –40°C to +85°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2427KCPZ 0°C to +70°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2427BCPZ –40°C to +85°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2428KCPZ 0°C to +70°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2428BCPZ –40°C to +85°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2429KCPZ 0°C to +70°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 AD2429BCPZ –40°C to +85°C 32-Lead Frame Chip Scale Package [LFCSP] CP-32-12 1 Z = RoHS Compliant Part. 2 Referenced temperature is ambient temperature. The ambient temperature is not a specification. See the Operating Conditions section for junction temperature (TJ) specification which is the only temperature specification. I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
©2020 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D16813-0-1/20(B)
Rev. B | Page 38 of 38 | January 2020 Document Outline Automotive Audio Bus A2B Transceiver A2B Bus Features A2B Transceiver Features Applications Table of Contents Revision History General Description A2B Bus Details I2C Interface I2S/TDM Interface I2S Reduced Rate Pulse Density Modulation (PDM) Interface GPIO Over Distance Mailboxes Data Slot Exchange Between Slaves Clock Sustain State Programmable Settings to Optimize EMC Performance Programmable LVDS Transmit Levels Spread-Spectrum Clocking Unique ID Support for Crossover or Straight Through Cabling Data Only and Power Only Bus Operation Specifications Operating Conditions Electrical Characteristics Power Supply Rejection Ratio (PSRR) Timing Specifications Power-Up Sequencing Restrictions A2B Bus System Specification RMS Time Interval Error (TIE) Jitter PDM Typical Performance Characteristics Absolute Maximum Ratings Thermal Characteristics ESD Caution Test Circuits and Switching Characteristics Output Drive Currents Test Conditions Output Enable Time Measurement Output Disable Time Measurement Capacitive Loading Pin Configuration and Function Descriptions Power Analysis Current Flow Constant Current PLL Supply Current VIN Quiescent Current IOVDD Current Peripheral Supply Current Digital Logic Supply Current A2B Bus TX/RX Current LVDS Transmitter and Receiver Supply Currents Downstream/Upstream Activity Level LVDS Transmitter and Receiver Idle Current VREG1 and VREG2 Output Currents Current at VIN (IVIN) Power Dissipation Resistance Between Nodes Voltage Regulator Current in Master Node or Local Powered Slave Node Power Dissipation of A2B Bus Power Analysis of Bus Powered System Supply Voltage Reducing Power Consumption Power-Down Mode Standby Mode Control Mode Thermal Power Designer Reference VSENSE and Considerations for Diodes Optional Add On Circuits Layout Guidelines Outline Dimensions Automotive Products Ordering Guide