Datasheet KSZ8993M (Microchip) - 3
| 制造商 | Microchip |
| 描述 | Integrated 3-Port 10/100 Managed Switch with PHYs |
| 页数 / 页 | 74 / 3 — KSZ8993M. Table of Contents |
| 文件格式/大小 | PDF / 1.6 Mb |
| 文件语言 | 英语 |
KSZ8993M. Table of Contents
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KSZ8993M Table of Contents
1.0 Introduction ... 4 2.0 Pin Description and Configuration ... 5 3.0 Functional Description .. 14 4.0 Register Descriptions .. 34 5.0 Operational Characteristics ... 57 6.0 Electrical Characteristics ... 58 7.0 Timing Specifications .. 59 8.0 Reset Circuit ... 66 9.0 Selection of Isolation Transformers ... 67 10.0 Package Outline .. 68 Appendix A: Data Sheet Revision History ... 70 The Microchip Web Site .. 71 Customer Change Notification Service ... 71 Customer Support ... 71 Product Identification System ... 72 2019 Microchip Technology Inc.
DS00003066A-page 3 Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer Transceiver 3.2 MAC and Switch 3.3 Advanced Switch Functions 3.4 Configuration Interface 3.5 Loopback Support 4.0 Register Descriptions 4.1 MII Management (MIIM) Registers 4.2 Register Descriptions 4.3 Register Map: Switch and PHY (8-bit registers) 4.4 Register Descriptions 4.5 Advanced Control Registers (Registers 96-127) 4.6 Static MAC Address Table 4.7 VLAN Table 4.8 Dynamic MAC Address Table 4.9 Management Information Base (MIB) Counters 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Specifications 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MAC Mode MII Timing 7.4 PHY Mode MII Timing 7.5 SPI Timing 7.6 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformers 10.0 Package Outline 10.1 Package Marking Information Appendix A: Data Sheet Revision History The Microchip Website Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service
KSZ8993M Table of Contents
1.0 Introduction ... 4 2.0 Pin Description and Configuration ... 5 3.0 Functional Description .. 14 4.0 Register Descriptions .. 34 5.0 Operational Characteristics ... 57 6.0 Electrical Characteristics ... 58 7.0 Timing Specifications .. 59 8.0 Reset Circuit ... 66 9.0 Selection of Isolation Transformers ... 67 10.0 Package Outline .. 68 Appendix A: Data Sheet Revision History ... 70 The Microchip Web Site .. 71 Customer Change Notification Service ... 71 Customer Support ... 71 Product Identification System ... 72 2019 Microchip Technology Inc.
DS00003066A-page 3 Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer Transceiver 3.2 MAC and Switch 3.3 Advanced Switch Functions 3.4 Configuration Interface 3.5 Loopback Support 4.0 Register Descriptions 4.1 MII Management (MIIM) Registers 4.2 Register Descriptions 4.3 Register Map: Switch and PHY (8-bit registers) 4.4 Register Descriptions 4.5 Advanced Control Registers (Registers 96-127) 4.6 Static MAC Address Table 4.7 VLAN Table 4.8 Dynamic MAC Address Table 4.9 Management Information Base (MIB) Counters 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Specifications 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MAC Mode MII Timing 7.4 PHY Mode MII Timing 7.5 SPI Timing 7.6 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformers 10.0 Package Outline 10.1 Package Marking Information Appendix A: Data Sheet Revision History The Microchip Website Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service