Datasheet TPD7107F (Toshiba) - 30

制造商Toshiba
描述Intelligent Power Device Silicon Power MOS Integrated Circuit
页数 / 页34 / 30 — TPD7107F
文件格式/大小PDF / 1.1 Mb
文件语言英语

TPD7107F

TPD7107F

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文件文字版本

TPD7107F
VDIAG2 - VDD VDIAG2 - Tj 4 4 ) (V T =25°C (V j V =12V = 12V DD G2 DIAG - GND = 10kΩ G2 DIAG - GND = 10kΩ IA IA D D V 3.5 V 3.5 load open) 3 load open) 3 tage ( tage ( vol vol put 2.5 2.5 put out out AG AG DI DI 2 2 0 6 12 18 24 30 -80 -40 0 40 80 120 160 Operating supply voltage V Junction temperature T DD (V) j(℃) VIO - VDD V IO - Tj 2 T =25°C 2 j V =13.5V DD V) V) 1 (m 1 (m IO IO tage V 0 tage V 0 vol vol fset fset of of -1 -1 Input Input -2 -2 0 6 12 18 24 30 -80 -40 0 40 80 120 160 Operating supply voltage V DD (V) Junction temperature Tj(℃) I SHUNT,IMIRROR - Tj 5 V =V =V A) A) SHUNT MIRROR DD (μ (μ V =5V IN OR 3 R IR I SHUNT I M MIRROR rent 1 rent ur cur c inal inal -1 m m SHUNT ter T ter R N O -3 U R SH IRM -5 -80 -40 0 40 80 120 160 Junction temperature Tj(℃) © 2020 30 2020-04-09 Toshiba Electronic Devices & Storage Corporation Document Outline 1. Description 2. Uses 3. Features 4. Block Diagram 5. Pin Assignments 6. Pin Description 7. Operational Description 7.1. Protection for reverse connection of power supply 7.2. Active clamp 7.3. Gate drive of Power MOSFET (Off driver) 7.3.1. Normal off, rapid off 7.3.2. Protection for disconnection of GND terminal 7.4. Load current sense at time of Power MOSFET drive 7.5. The abnormalities in power supply voltage (VDD over voltage, VDD under voltage) 7.6. Over current protection 7.7. Over temperature protection. 7.8. Abnormalities in voltage between Drain and source of the external FET (VDS error) 7.9. Load open / VDD short of load line and diagnosis output 7.10. Truth Table 7.11. State Transition Diagram 8. Absolute Maximum Ratings 8.1. Thermal Resistance 9. Operating Ranges 10. Electrical Characteristics 10.1. Electrical characteristics 1 10.2. Electrical characteristics 2 10.3. Current sense amp Electrical Characteristics 11. Test Circuit 11.1. Test circuit 1 High level output voltage (3) 11.2. Test circuit 2 Switching time (Td-ON, Td-OFF, Tr, Tf) 11.3. Test circuit 3 Off impedance at GND open 11.4. Test circuit 4 Input offset voltage 12. Characteristic curves 13. Package Information 13.1. Package Dimensions 13.2. Marking 13.3. Land Pattern Dimensions for Reference only 14. IC Usage Notes 14.1. Notes on Handling of ICs 14.2. Notes on mounting. RESTRICTIONS ON PRODUCT USE