Datasheet HVLED007 (STMicroelectronics) - 11

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HVLED007 Application information
Note that in Equation 2 also TON is denoted as a function of the instantaneous line phase θ; in fact, with the novel method it is no longer constant as in the traditional method. The "Input Current Shaper" (ICS) that implements this basic idea is shown in Figure 5 along with the overall control loop inside the IC.
Figure 5. Input current shaper (ICS) block and its interconnection with HVLED007 control
ZĞĐƚŝĨŝĞĚ ŝŶƉƵƚ ǀŽůƚĂŐĞ  dƌĂŶƐĨŽƌŵĞƌƉƌŝŵĂƌLJ KDW RmultH Ϯ͘ϱs RCOMP  V WtD c ůĂƚĐŚ ' V ș k MULT I FW 293 DƵůƚŝƉůŝĞƌ I ș k ș ĞůĂLJ MULT I Vc VMULT S Q dZ Dh>d Vcs ș V ref Ct R Ip tș multL R Rf d WtD R ĐŽŵƉĂƌĂƚŽƌ ^ t C VZf Vcsmax Vcs tș t Q SW Cf dDĐŽŶƚƌŽůůŽŽƉ Rs
/^ ,s>ϬϬϳ
The ON/OFF mechanism of the external power switch is exactly the same as in the traditional TM method: the power switch is turned on as the secondary current zeroes (with a delay TR to achieve valley switching, see "Section 4.8: Zero current detection and triggering block (pin ZCD); starter") and turned off when the voltage Vcs (t, θ) on the current sensing input CS (proportional to the primary current Ip (t, θ)) reaches the reference value Vcsref (θ). Note that the explicit dependence on time (t) denotes cycle-by-cycle quantities. The difference between the traditional TM method and that implemented in the HVLED007 is in the way the reference Vcsref (θ) is generated. In the traditional TM method, Vcsref (θ) is generated by taking the input voltage as the template and adjusting its amplitude with feedback loop control voltage via the multiplier; in the HVLED007 the output of the multiplier is processed by the ICS circuit highlighted in the dotted box before being provided to the PWM comparator. The ICS circuit is composed of the current generator IMULT (θ), the external capacitor Ct connected between pin CT and ground and a switched resistor Rt that is connected in parallel to Ct during the ON-time TON (θ) of the power switch through the switch SW. The current generator provides the charging current for Ct, given by:
Equation 3
I       MULT  = kI K p V inpk sin Vc where Kp = RmultL / (RmultH + RmultL) is the voltage gain of the resistor divider that senses the rectified input voltage. The key waveforms are shown in Figure 6. Assuming T(θ) << Rt Ct << 1/(2 fline), to a first approximation the voltage ripple across the capacitor Ct can be neglected and the current IMULT (θ) can be considered constant in a switching cycle. The average voltage VCt (θ) developed across Ct, which shapes the peak primary current Ippk(θ), is found by charge balance in a switching cycle: DS12866 Rev 1 11/33 33 Document Outline Table 1. Device summary 1 Block diagram Figure 1. Block diagram Table 2. Absolute maximum ratings 2 Pin connections Figure 2. Pin connection (top view) Table 3. Thermal data Table 4. Pin functions (continued) 3 Electrical characteristics Table 5. Electrical characteristics (continued) 4 Application information 4.1 Introduction Figure 3. Input current distortion in Hi-PF QR flyback converters with traditional TM control: current shape and resulting total harmonic distortion and power factor vs. Kv (= Vinpk/VR) ratio 4.2 Input current shaping function - operating principle Figure 4. Hi-PF QR flyback converter with the traditional TM control: current waveforms Figure 5. Input current shaper (ICS) block and its interconnection with HVLED007 control Figure 6. Key waveforms of the ICS circuit in figure 5 Figure 7. Shape of the current reference Vcsref(θ) (5) at different input voltages (i.e. Kv values) 4.3 Operation of a Hi-PF QR flyback converter based on the HVLED007 Table 6. Timing quantities in a HVLED007-based Hi-PF QR flyback converter Table 7. Control quantities in a HVLED007-based Hi-PF QR flyback converter Table 8. Electrical quantities in a HVLED007-based Hi-PF QR flyback converter 4.4 Shaping capacitor (Ct) selection (pin CT) 4.5 Control input for isolated feedback and optocoupler driving (pin COMP) Figure 8. Output characteristic of pin COMP and significant levels 4.6 Multiplier input for input voltage sensing (pin MULT) 4.7 Current sensing input (pin CS). Sense resistor (Rs) selection Figure 9. Effect of ripple on Ct on current sense signal: a) within linear dynamics, close to clamp level; b) signal slightly exceeding clamp level; c) signal exceeding clamp level, with OCP activation 4.8 Zero current detection and triggering block (pin ZCD); starter 4.9 Overload and short-circuit protection (OCP function) Figure 10. Functional schematic of the overload and short-circuit protection function 4.10 Overvoltage protection (OVP function) Figure 11. Functional schematic of the OVP function 4.11 Soft-restart function Figure 12. Functional schematic of the soft restart function 4.12 Suggested step-by-step design procedure of a Hi-PF QR flyback converter based on the HVLED0007 Table 9. Basic electrical specification and key parameters of a Hi-PF QR flyback Figure 13. Typical application schematic (reference for suggested design procedure) 5 Referenced documents 6 Package information Table 10. SO-8 mechanical data Figure 14. Package dimensions 7 Revision history Table 11. Document history