Datasheet HMC8121 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 81 GHz to 86 GHz, E-Band Variable Gain Amplifier |
| 页数 / 页 | 16 / 5 — Data Sheet. HMC8121. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. GND. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 352 Kb |
| 文件语言 | 英语 |
Data Sheet. HMC8121. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. GND. RFOUT. TOP VIEW. (Not to Scale). GG2. DD1. DD2. CTL. GG3. DD3. GG4. DD4. GG5
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Data Sheet HMC8121 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D IN D GN RF GN 1 2 3 4 GND 5 RFOUT 6 HMC8121 GND TOP VIEW (Not to Scale) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 T 1 2 F T D D D D D D GG2 DD1 DD2 DE GN GN CTL CTL GG3 DD3 GG4 DD4 GG5 DD5 GG6 DD6 RE DE /V V V V V GN V V GN V V GN V V GN V V V
2
1 V V
00
EN GG
154-
V
13 Figure 2. Pad Configuration
Table 4. Pad Function Descriptions Pad No. Mnemonic Description
1, 3, 4, 6, 10, 13, 16, GND Ground Connection (See Figure 3). 19, 24, 27 2 RFIN RF Input. DC couple RFIN and match it to 50 Ω (see Figure 4). 5 RFOUT RF Output. DC couple RFOUT and match it to 50 Ω (see Figure 5). 7 VDET Detector Voltage for the Power Detector (See Figure 6). VDET is the dc voltage representing the RF output power rectified by the diode, which is biased through an external resistor. Refer to the typical application circuit for the required external components (see Figure 38). 8 VREF Reference Voltage for the Power Detector (See Figure 6). VREF is the dc bias of the diode biased through an external resistor used for the temperature compensation of VDET. Refer to the typical application circuit for the required external components (see Figure 38). 9, 12, 15, 18, 25, 26 VDD6 to VDD1 Drain Bias Voltage for the Variable Gain Amplifier (See Figure 7). For the required external components, see Figure 38. 11, 14, 17, 20, 28 VGG6 to VGG3, Gate Bias Voltage for the Variable Gain Amplifier (See Figure 8). For the required external components, VGG1/VGG2 see Figure 38. 21, 22 VCTL2, VCTL1 Gain Control Voltage for the Variable Gain Amplifier (See Figure 9). For the required external components, see Figure 38. 23 ENVDET Envelope Detector (See Figure 10). For the required external components, see Figure 38. Die Bottom GND Ground. Die bottom must be connected to the RF/dc ground (see Figure 3). Rev. B | Page 5 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAM MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS HANDLING PRECAUTIONS Storage Cleanliness Static Sensitivity Transients General Handling MOUNTING Eutectic Die Attach Epoxy Die Attach WIRE BONDING OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet HMC8121 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D IN D GN RF GN 1 2 3 4 GND 5 RFOUT 6 HMC8121 GND TOP VIEW (Not to Scale) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 T 1 2 F T D D D D D D GG2 DD1 DD2 DE GN GN CTL CTL GG3 DD3 GG4 DD4 GG5 DD5 GG6 DD6 RE DE /V V V V V GN V V GN V V GN V V GN V V V
2
1 V V
00
EN GG
154-
V
13 Figure 2. Pad Configuration
Table 4. Pad Function Descriptions Pad No. Mnemonic Description
1, 3, 4, 6, 10, 13, 16, GND Ground Connection (See Figure 3). 19, 24, 27 2 RFIN RF Input. DC couple RFIN and match it to 50 Ω (see Figure 4). 5 RFOUT RF Output. DC couple RFOUT and match it to 50 Ω (see Figure 5). 7 VDET Detector Voltage for the Power Detector (See Figure 6). VDET is the dc voltage representing the RF output power rectified by the diode, which is biased through an external resistor. Refer to the typical application circuit for the required external components (see Figure 38). 8 VREF Reference Voltage for the Power Detector (See Figure 6). VREF is the dc bias of the diode biased through an external resistor used for the temperature compensation of VDET. Refer to the typical application circuit for the required external components (see Figure 38). 9, 12, 15, 18, 25, 26 VDD6 to VDD1 Drain Bias Voltage for the Variable Gain Amplifier (See Figure 7). For the required external components, see Figure 38. 11, 14, 17, 20, 28 VGG6 to VGG3, Gate Bias Voltage for the Variable Gain Amplifier (See Figure 8). For the required external components, VGG1/VGG2 see Figure 38. 21, 22 VCTL2, VCTL1 Gain Control Voltage for the Variable Gain Amplifier (See Figure 9). For the required external components, see Figure 38. 23 ENVDET Envelope Detector (See Figure 10). For the required external components, see Figure 38. Die Bottom GND Ground. Die bottom must be connected to the RF/dc ground (see Figure 3). Rev. B | Page 5 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAM MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS HANDLING PRECAUTIONS Storage Cleanliness Static Sensitivity Transients General Handling MOUNTING Eutectic Die Attach Epoxy Die Attach WIRE BONDING OUTLINE DIMENSIONS ORDERING GUIDE