Datasheet AD9266-EP (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 16-Bit, 20/40/65/80 MSPS, 1.8 V Analog-to-Digital Converter |
| 页数 / 页 | 12 / 9 — Enhanced Product. AD9266-EP. ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL … |
| 修订版 | B |
| 文件格式/大小 | PDF / 241 Kb |
| 文件语言 | 英语 |
Enhanced Product. AD9266-EP. ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL CHARACTERISTICS. Parameter. Rating
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Enhanced Product AD9266-EP ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL CHARACTERISTICS Parameter Rating
The exposed paddle is the only ground connection for the chip. AVDD to AGND −0.3 V to +2.0 V The exposed paddle must be soldered to the AGND plane of the DRVDD to AGND −0.3 V to +3.9 V circuit board. Soldering the exposed paddle to the board also VIN+, VIN− to AGND −0.3 V to AVDD + 0.2 V increases the reliability of the solder joints and maximizes the CLK+, CLK− to AGND −0.3 V to AVDD + 0.2 V thermal capability of the package. VREF to AGND −0.3 V to AVDD + 0.2 V
Table 7. Thermal Resistance
SENSE to AGND −0.3 V to AVDD + 0.2 V VCM to AGND −0.3 V to AVDD + 0.2 V
Airflow Velocity
RBIAS to AGND −0.3 V to AVDD + 0.2 V
Package Type (m/sec) θ 1, 2 1, 3 1, 4 1, 2 JA θJC θJB
Ψ
JT Unit
CSB to AGND −0.3 V to DRVDD + 0.3 V 32-Lead LFCSP 0 37.1 3.1 20.7 0.3 °C/W SCLK/DFS to AGND −0.3 V to DRVDD + 0.3 V 5 mm × 5 mm 1.0 32.4 0.5 °C/W SDIO/PDWN to AGND −0.3 V to DRVDD + 0.3 V 2.5 29.1 0.8 °C/W MODE/OR to AGND −0.3 V to DRVDD + 0.3 V 1 D1_D0 Through D15_D14 to AGND −0.3 V to DRVDD + 0.3 V Per JEDEC 51-7, plus JEDEC 51-5 2S2P test board. 2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air). DCO to AGND −0.3 V to DRVDD + 0.3 V 3 Per MIL-Std 883, Method 1012.1. 4 Operating Temperature Range −55°C to +125°C Per JEDEC JESD51-8 (still air). (Ambient) Maximum Junction Temperature 150°C Typical θJA is specified for a 4-layer printed circuit board (PCB) Under Bias with a solid ground plane. As shown in Table 7, airflow improves Storage Temperature Range −65°C to +150°C heat dissipation, which reduces θJA. In addition, metal in direct (Ambient) contact with the package leads from metal traces, through holes, ground, and power planes reduces the θJA. Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 9 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
Enhanced Product AD9266-EP ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL CHARACTERISTICS Parameter Rating
The exposed paddle is the only ground connection for the chip. AVDD to AGND −0.3 V to +2.0 V The exposed paddle must be soldered to the AGND plane of the DRVDD to AGND −0.3 V to +3.9 V circuit board. Soldering the exposed paddle to the board also VIN+, VIN− to AGND −0.3 V to AVDD + 0.2 V increases the reliability of the solder joints and maximizes the CLK+, CLK− to AGND −0.3 V to AVDD + 0.2 V thermal capability of the package. VREF to AGND −0.3 V to AVDD + 0.2 V
Table 7. Thermal Resistance
SENSE to AGND −0.3 V to AVDD + 0.2 V VCM to AGND −0.3 V to AVDD + 0.2 V
Airflow Velocity
RBIAS to AGND −0.3 V to AVDD + 0.2 V
Package Type (m/sec) θ 1, 2 1, 3 1, 4 1, 2 JA θJC θJB
Ψ
JT Unit
CSB to AGND −0.3 V to DRVDD + 0.3 V 32-Lead LFCSP 0 37.1 3.1 20.7 0.3 °C/W SCLK/DFS to AGND −0.3 V to DRVDD + 0.3 V 5 mm × 5 mm 1.0 32.4 0.5 °C/W SDIO/PDWN to AGND −0.3 V to DRVDD + 0.3 V 2.5 29.1 0.8 °C/W MODE/OR to AGND −0.3 V to DRVDD + 0.3 V 1 D1_D0 Through D15_D14 to AGND −0.3 V to DRVDD + 0.3 V Per JEDEC 51-7, plus JEDEC 51-5 2S2P test board. 2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air). DCO to AGND −0.3 V to DRVDD + 0.3 V 3 Per MIL-Std 883, Method 1012.1. 4 Operating Temperature Range −55°C to +125°C Per JEDEC JESD51-8 (still air). (Ambient) Maximum Junction Temperature 150°C Typical θJA is specified for a 4-layer printed circuit board (PCB) Under Bias with a solid ground plane. As shown in Table 7, airflow improves Storage Temperature Range −65°C to +150°C heat dissipation, which reduces θJA. In addition, metal in direct (Ambient) contact with the package leads from metal traces, through holes, ground, and power planes reduces the θJA. Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 9 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS ORDERING GUIDE