Datasheet AD8284 (Analog Devices) - 3

制造商Analog Devices
描述Radar Receive Path AFE: 4-Channel MUX with LNA, PGA, AAF, and ADC
页数 / 页28 / 3 — Data Sheet. AD8284. SPECIFICATIONS AC SPECIFICATIONS. Table 2. …
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Data Sheet. AD8284. SPECIFICATIONS AC SPECIFICATIONS. Table 2. Parameter1. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet AD8284 SPECIFICATIONS AC SPECIFICATIONS Table 2 Parameter1 Test Conditions/Comments Min Typ Max Unit

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Data Sheet AD8284 SPECIFICATIONS AC SPECIFICATIONS
AVDD18x = 1.8 V, AVDD33x = 3.3 V, DVDD18x = 1.8 V, DVDD33x = 3.3 V, 1.0 V internal ADC reference, fIN = 2.5 MHz, fS = 60 MSPS, RS = 50 Ω, LNA + PGA gain = 35 dB, LPF cutoff = fSAMPLECH/4, 12-bit operation, temperature = −40°C to +105°C, al specifications guaranteed by testing, unless otherwise noted.
Table 2. Parameter1 Test Conditions/Comments Min Typ Max Unit
ANALOG CHANNEL CHARACTERISTICS LNA, PGA, and AAF channel Gain Programmable 17/23/29/35 dB Gain Range 18 dB Gain Error −1.25 +1.25 dB Input Voltage Range2 Channel gain = 17 dB 0.283 V p-p Channel gain = 23 dB 0.142 V p-p Channel gain = 29 dB 0.071 V p-p Channel gain = 35 dB 0.036 V p-p Input Resistance 200 Ω input impedance 0.200 0.265 0.300 kΩ 200 kΩ input impedance 160 200 240 kΩ Input Capacitance2 7 pF Input Referred Voltage Noise2 Maximum gain at 1 MHz 1.85 nV/√Hz Minimum gain at 1 MHz 6.03 nV/√Hz Noise Figure2 Maximum gain, RS = 50 Ω, not terminated 7.1 dB Maximum gain, RS = RIN = 50 Ω 12.7 dB Output Offset Gain = 17 dB −60 +60 LSB Gain = 35 dB −250 +250 LSB AAF Low-Pass Filter Cutoff −3 dB, programmable 9.0 to 15.0 MHz Tolerance After filter autotune −10 ±5 +10 % AAF Attenuation in Stop Band2 Third-order elliptic filter 2× cutoff 30 dB 3× cutoff 40 dB Group Delay Variation2 Filter set at 9 MHz 400 ns 1 dB Compression2 Relative to output 11.9 dBm Saturation Flag Response Time Time between saturation event and saturation flag 30 100 ns going high (1 dB overdrive) Time between end of saturation event and saturation 25 40 ns flag going low Saturation Flag Accuracy Gain = 29 dB Off For PGA voltages below 2 V p-p 2 V p-p On For PGA voltages above 2.25 V p-p 2.25 V p-p Mux2 On Resistance 50 Ω Switching Time 200 ns POWER SUPPLY AVDD18x2 1.7 1.8 1.9 V AVDD33x2 3.1 3.3 3.5 V DVDD18x2 1.7 1.8 1.9 V DVDD33x2 3.1 3.3 3.5 V IAVDD18 fS = 60 MSPS 54 mA IAVDD33 fS = 60 MSPS 65 mA IDVDD18 fS = 60 MSPS 15 mA IDVDD33 fS = 60 MSPS 2 mA Total Power Dissipation No signal, typical supply voltage × maximum supply 345 mW current; excludes output current Rev. D | Page 3 of 28 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing and Switching Diagram Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Radar Receive Path AFE Channel Overview Multiplexer Low Noise Amplifier Recommendation Antialiasing Filter Saturation Flag ADC AUX Channel Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations SDI and SDO Pins SCLK Pin CS Pin RBIAS Pin Voltage Reference Power and Ground Recommendations Exposed Pad Thermal Heat Slug Recommendations Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Caution Logic Levels Reserved Locations Default Values Application Circuits Packaging and Ordering Information Outline Dimensions Ordering Guide Automotive Products