Datasheet ADRF6520 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | Dual Programmable Filters and VGAs for 2 GHz Channel Spacing for μW Radios |
| 页数 / 页 | 29 / 9 — Data Sheet. ADRF6520. 0.5. 0.4. CH (. 0.3. 0.2. N M. 0.1. –0.1. CHANNE … |
| 文件格式/大小 | PDF / 1.6 Mb |
| 文件语言 | 英语 |
Data Sheet. ADRF6520. 0.5. 0.4. CH (. 0.3. 0.2. N M. 0.1. –0.1. CHANNE –0.2. CHANNE. –0.2. –0.3. –0.4. –0.5. 0.25. 0.50. 0.75. 1.00. 1.25. 1.50. VGN1 (V). VGN2 (V)
该数据表的模型线
文件文字版本
Data Sheet ADRF6520 0.5 0.5 B) B) d 0.4 d 0.4 CH ( CH ( 0.3 0.3 AT AT M M IS 0.2 IS 0.2 N M N M 0.1 0.1 AI AI G G L 0 L 0 –0.1 –0.1 CHANNE –0.2 CHANNE O –0.2 O T T L L –0.3 –0.3 –0.4 –0.4 CHANNE CHANNE –0.5 –0.5 0 0.25 0.50 0.75 1.00 1.25 1.50
005
0 0.25 0.50 0.75 1.00 1.25 1.50
008
VGN1 (V)
14830-
VGN2 (V)
14830- Figure 9. Channel to Chanel Gain Mismatch vs. VGN1; VGN2 = 0 V, Figure 12. Channel to Channel Gain Mismatch vs. VGN2; VGN1 = 1.5 V, Bypass Mode at 500 MHz Bypass Mode at 500 MHz
60 60 VPS = 3.3V 50 VPS = 3.15V 50 VPS = 3.45V 40 BYPASS T 720MHz A = +85°C 30 40 TA = +25°C T 576MHz A = –40°C 20 30 10 B) B) d d 432MHz 0 N ( 20 N ( AI AI G –10 G 10 288MHz –20 –30 0 –40 –10 144MHz 36MHz 72MHz –50 –60 –20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
009
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
013
FREQUENCY (GHz)
14830-
FREQUENCY (MHz)
14830- Figure 10. Gain vs. Frequency over VGN1/VGN2, 3 dB Gain Steps Figure 13. Frequency Response over Supply and Temperature for 36 MHz, 144 MHz, 288 MHz, 432 MHz, 576 MHz, and 720 MHz Filter Corners and Bypass
55 55.0 36MHz FILTER 72MHz FILTER 54.5 144MHz FILTER 288MHz FILTER 432MHz FILTER 54.0 54 576MHz FILTER 720MHz FILTER 53.5 FILTER BYPASS 53.0 B) B) d d 53 N ( 52.5 N ( AI AI G G 52.0 36MHz FILTER 51.5 72MHz FILTER 52 144MHz FILTER 51.0 288MHz FILTER 432MHz FILTER 576MHz FILTER 50.5 720MHz FILTER FILTER BYPASS 51 50.0 1 10 100 1000
011
100 300 500 700 900 1100 1300 1500
014
FREQUENCY (MHz)
14830-
FREQUENCY (MHz)
14830- Figure 11. Gain vs. Frequency over all Bandwidth Settings; Figure 14. Gain vs. Frequency over all Bandwidth Settings; VGN1 = VGN2 = 1.5 V (Logarithmic) VGN1 = VGN2 = 1.5 V (Linear) Rev. 0 | Page 9 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT VGAs RMS DETECTOR PROGRAMMABLE FILTERS Bypassing the Filters VARIABLE GAIN AMPLIFIERS OUTPUT BUFFERS/ADC DRIVERS DC OFFSET COMPENSATION LOOP PROGRAMMING THE ADRF6520 NOISE CHARACTERISTICS DISTORTION CHARACTERISTICS MAXIMIZING THE DYNAMIC RANGE KEY PARAMETERS FOR QUADRATURE-BASED RECEIVERS SPI REGISTER AND TIMING REGISTER READ/WRITE TIMING Write Cycle Read Cycle APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DC OFFSET COMPENSATION LOOP ENABLED SERIAL PORT CONNECTIONS ENABLE/DISABLE FUNCTION GAIN PIN DECOUPLING RMS DETECTOR CONNECTIONS VGA2 GAIN STEP RESPONSE LINEAR OPERATION OF THE ADRF6520 EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
005
0 0.25 0.50 0.75 1.00 1.25 1.50
008
VGN1 (V)
14830-
VGN2 (V)
14830- Figure 9. Channel to Chanel Gain Mismatch vs. VGN1; VGN2 = 0 V, Figure 12. Channel to Channel Gain Mismatch vs. VGN2; VGN1 = 1.5 V, Bypass Mode at 500 MHz Bypass Mode at 500 MHz
60 60 VPS = 3.3V 50 VPS = 3.15V 50 VPS = 3.45V 40 BYPASS T 720MHz A = +85°C 30 40 TA = +25°C T 576MHz A = –40°C 20 30 10 B) B) d d 432MHz 0 N ( 20 N ( AI AI G –10 G 10 288MHz –20 –30 0 –40 –10 144MHz 36MHz 72MHz –50 –60 –20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
009
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
013
FREQUENCY (GHz)
14830-
FREQUENCY (MHz)
14830- Figure 10. Gain vs. Frequency over VGN1/VGN2, 3 dB Gain Steps Figure 13. Frequency Response over Supply and Temperature for 36 MHz, 144 MHz, 288 MHz, 432 MHz, 576 MHz, and 720 MHz Filter Corners and Bypass
55 55.0 36MHz FILTER 72MHz FILTER 54.5 144MHz FILTER 288MHz FILTER 432MHz FILTER 54.0 54 576MHz FILTER 720MHz FILTER 53.5 FILTER BYPASS 53.0 B) B) d d 53 N ( 52.5 N ( AI AI G G 52.0 36MHz FILTER 51.5 72MHz FILTER 52 144MHz FILTER 51.0 288MHz FILTER 432MHz FILTER 576MHz FILTER 50.5 720MHz FILTER FILTER BYPASS 51 50.0 1 10 100 1000
011
100 300 500 700 900 1100 1300 1500
014
FREQUENCY (MHz)
14830-
FREQUENCY (MHz)
14830- Figure 11. Gain vs. Frequency over all Bandwidth Settings; Figure 14. Gain vs. Frequency over all Bandwidth Settings; VGN1 = VGN2 = 1.5 V (Logarithmic) VGN1 = VGN2 = 1.5 V (Linear) Rev. 0 | Page 9 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT VGAs RMS DETECTOR PROGRAMMABLE FILTERS Bypassing the Filters VARIABLE GAIN AMPLIFIERS OUTPUT BUFFERS/ADC DRIVERS DC OFFSET COMPENSATION LOOP PROGRAMMING THE ADRF6520 NOISE CHARACTERISTICS DISTORTION CHARACTERISTICS MAXIMIZING THE DYNAMIC RANGE KEY PARAMETERS FOR QUADRATURE-BASED RECEIVERS SPI REGISTER AND TIMING REGISTER READ/WRITE TIMING Write Cycle Read Cycle APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DC OFFSET COMPENSATION LOOP ENABLED SERIAL PORT CONNECTIONS ENABLE/DISABLE FUNCTION GAIN PIN DECOUPLING RMS DETECTOR CONNECTIONS VGA2 GAIN STEP RESPONSE LINEAR OPERATION OF THE ADRF6520 EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE