Datasheet EFR32MG21 (Silicon Labs)

制造商Silicon Labs
描述Mighty Gecko Multiprotocol Wireless SoC Family
页数 / 页75 / 1 — EFR32MG21 Mighty Gecko Multiprotocol Wireless SoC Family Data Sheet. KEY …
文件格式/大小PDF / 973 Kb
文件语言英语

EFR32MG21 Mighty Gecko Multiprotocol Wireless SoC Family Data Sheet. KEY FEATURES. Core / Memory. Clock Management. Energy

Datasheet EFR32MG21 Silicon Labs

该数据表的模型线

文件文字版本

EFR32MG21 Mighty Gecko Multiprotocol Wireless SoC Family Data Sheet
The Mighty Gecko multiprotocol family of SoCs is part of the Wire- less Gecko portfolio. Mighty Gecko SoCs are ideal for enabling en-
KEY FEATURES
ergy-friendly multiprotocol, multiband networking for IoT devices. • 32-bit ARM® Cortex®-M33 core with 80 MHz maximum operating frequency The single-die solution combines an 80 MHz ARM Cortex-M33 with a high performance • Up to 1024 kB of flash and 96 kB of RAM 2.4 GHz radio to provide an industry-leading, energy efficient wireless SoC for IoT con- nected applications. • 12-channel Peripheral Reflex System enabling autonomous interaction of MCU Mighty Gecko applications include: peripherals • Integrated PA with up to 20 dBm (2.4 • IoT Multi-Protocol Devices GHz) TX power • Lighting • Robust peripheral set and up to 20 GPIO in a 4x4 QFN package • Connected Home • Gateways and Digital Assistants • Building Automation and Security
Core / Memory Clock Management Energy Security Management HF Crystal HF Fast Startup Crypto Acceleration Oscillator RC Oscillator RC Oscillator Voltage ARM CortexTM M33 processor Flash Program Regulator with DSP extensions, Memory Advanced Security FPU and TrustZone EM23 HF RC Oscillator Brown-Out True Random Detector Number Generator LDMA LF Crystal Ultra LF RC LF ETM Debug Interface RAM Memory Controller Oscillator Oscillator RC Oscillator Power-On Reset Security Core 32-bit bus Peripheral Reflex System Radio Transceiver Serial I/O Ports Timers and Triggers Analog I/F Interfaces DEMOD External RF Frontend USART Timer/Counter Protocol Timer ADC Interrupts I LNA FRC BUFC Q PGA IFADC General Analog I2C Low Energy Timer Watchdog Timer Purpose I/O Comparator PA AGC Real Time Pin Reset Capture Counter PA Frequency Synth CRC RAC MOD Pin Wakeup Back-Up Real Time Counter Lowest power mode with peripheral operational: EM0—Active EM1—Sleep EM2—Deep Sleep EM3—Stop EM4—Shutoff silabs.com
| Building a more connected world. Rev. 1.0 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Radio 3.2.1 Antenna Interface 3.2.2 Fractional-N Frequency Synthesizer 3.2.3 Receiver Architecture 3.2.4 Transmitter Architecture 3.2.5 Packet and State Trace 3.2.6 Data Buffering 3.2.7 Radio Controller (RAC) 3.3 General Purpose Input/Output (GPIO) 3.4 Clocking 3.4.1 Clock Management Unit (CMU) 3.4.2 Internal and External Oscillators 3.5 Counters/Timers and PWM 3.5.1 Timer/Counter (TIMER) 3.5.2 Low Energy Timer (LETIMER) 3.5.3 Real Time Clock with Capture (RTCC) 3.5.4 Back-Up Real Time Counter 3.5.5 Watchdog Timer (WDOG) 3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) 3.6.2 Inter-Integrated Circuit Interface (I2C) 3.6.3 Peripheral Reflex System (PRS) 3.7 Security Features 3.7.1 Standard Security 3.7.2 True Random Number Generator 3.8 Analog 3.8.1 Analog Comparator (ACMP) 3.8.2 Analog to Digital Converter (ADC) 3.9 Reset Management Unit (RMU) 3.10 Core and Memory 3.10.1 Processor Core 3.10.2 Memory System Controller (MSC) 3.10.3 Linked Direct Memory Access Controller (LDMA) 3.11 Memory Map 3.12 Configuration Summary 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Absolute Maximum Ratings 4.1.2 General Operating Conditions 4.1.3 Thermal Characteristics 4.1.4 Current Consumption 4.1.4.1 MCU current consumption at 1.8V 4.1.4.2 MCU current consumption at 3.0V 4.1.4.3 Radio current consumption at 1.8V 4.1.4.4 Radio current consumption at 3.0V 4.1.5 2.4 GHz RF Transceiver Characteristics 4.1.5.1 RF Transmitter Characteristics 4.1.5.2 RF Receiver Characteristics 4.1.6 Flash Characteristics 4.1.7 Wake Up, Entry, and Exit times 4.1.8 Oscillators 4.1.8.1 High Frequency Crystal Oscillator 4.1.8.2 Low Frequency Crystal Oscillator 4.1.8.3 High Frequency RC Oscillator (HFRCO) 4.1.8.4 Fast Start_Up RC Oscillator (FSRCO) 4.1.8.5 Low Frequency RC Oscillator 4.1.8.6 Ultra Low Frequency RC Oscillator 4.1.9 GPIO Pins (3V GPIO pins) 4.1.10 Analog to Digital Converter (ADC) 4.1.11 Analog Comparator (ACMP) 4.1.12 Temperature Sense 4.1.13 Brown Out Detectors 4.1.13.1 DVDD BOD 4.1.13.2 LE DVDD BOD 4.1.13.3 AVDD and VIO BODs 4.1.14 SPI Electrical Specifications 4.1.14.1 SPI Master Timing 4.1.14.2 SPI Slave Timing 4.1.15 I2C Electrical Specifications 4.1.15.1 I2C Standard-mode (Sm) 4.1.15.2 I2C Fast-mode (Fm) 4.1.15.3 I2C Fast-mode Plus (Fm+) 4.2 Typical Performance Curves 4.2.1 Supply Current 4.2.2 2.4 GHz Radio 5. Typical Connection Diagrams 5.1 Power 5.2 RF Matching Networks 5.2.1 2.4 GHz 0 dBm Matching Network 5.2.2 2.4 GHz 10 dBm Matching Network 5.2.3 2.4 GHz 20 dBm Matching Network 5.3 Other Connections 6. Pin Definitions 6.1 QFN32 2.4GHz Device Pinout 6.2 Alternate Function Table 6.3 Analog Peripheral Connectivity 6.4 Digital Peripheral Connectivity 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. Revision History