Datasheet LT1993-10 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 700MHz Low Distortion, Low Noise Differential Amplifier/ADC Driver (AV = 10V/V) |
| 页数 / 页 | 20 / 10 — PIN FUNCTIONS VOCM (Pin 2):. +OUTFILTERED, –OUTFILTERED (Pins 6, 7):. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 2.8 Mb |
| 文件语言 | 英语 |
PIN FUNCTIONS VOCM (Pin 2):. +OUTFILTERED, –OUTFILTERED (Pins 6, 7):. CCA, VCCB, VCCC (Pins 3, 10, 1):. ENABLE (Pin 11):
该数据表的模型线
文件文字版本
link to page 11 LT1993-10
PIN FUNCTIONS VOCM (Pin 2):
This pin sets the output common mode
+OUTFILTERED, –OUTFILTERED (Pins 6, 7):
Filtered voltage. Without additional biasing, both inputs bias to Outputs. These pins add a series 25Ω resistor from the this voltage as well. This input is high impedance. unfiltered outputs and three 12pF capacitors. Each output
V
has 12pF to VEE, plus an additional 12pF between each pin
CCA, VCCB, VCCC (Pins 3, 10, 1):
Positive Power Supply (Normally Tied to 5V). All three pins must be tied to the (See the Block Diagram). This filter has a –3dB bandwidth same voltage. Bypass each pin with 1000pF and 0.1µF of 175MHz. capacitors as close to the package as possible. Split sup-
ENABLE (Pin 11):
This pin is a TTL logic input referenced plies are possible as long as the voltage between VCC and to the VEEC pin. If low, the LT1993-10 is enabled and VEE is 5V. draws typically 100mA of supply current. If high, the
V
LT1993-10 is disabled and draws typically 250µA.
EEA, VEEB, VEEC (Pins 4, 9, 12):
Negative Power Supply (Normally Tied to Ground). All three pins must be tied
–INA, –INB (Pins 14, 13):
Negative Inputs. These pins to the same voltage. Split supplies are possible as long are normally tied together. These inputs may be DC- or as the voltage between VCC and VEE is 5V. If these pins AC-coupled. If the inputs are AC-coupled, they will self- are not tied to ground, bypass each pin with 1000pF and bias to the voltage applied to the VOCM pin. 0.1µF capacitors as close to the package as possible.
+INA, +INB (Pins 16, 15):
Positive Inputs. These pins
+OUT, –OUT (Pins 5, 8):
Outputs (Unfiltered). These are normally tied together. These inputs may be DC- or pins are high bandwidth, low-impedance outputs. The AC-coupled. If the inputs are AC-coupled, they will self- DC output voltage at these pins is set to the voltage bias to the voltage applied to the VOCM pin. applied at VOCM.
Exposed Pad (Pin 17):
Tie the pad to VEEC (Pin 12). If split supplies are used, DO NOT tie the pad to ground. Rev C 10 For more information www.analog.com Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information DC Electrical Characteristics AC Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Application Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS VOCM (Pin 2):
This pin sets the output common mode
+OUTFILTERED, –OUTFILTERED (Pins 6, 7):
Filtered voltage. Without additional biasing, both inputs bias to Outputs. These pins add a series 25Ω resistor from the this voltage as well. This input is high impedance. unfiltered outputs and three 12pF capacitors. Each output
V
has 12pF to VEE, plus an additional 12pF between each pin
CCA, VCCB, VCCC (Pins 3, 10, 1):
Positive Power Supply (Normally Tied to 5V). All three pins must be tied to the (See the Block Diagram). This filter has a –3dB bandwidth same voltage. Bypass each pin with 1000pF and 0.1µF of 175MHz. capacitors as close to the package as possible. Split sup-
ENABLE (Pin 11):
This pin is a TTL logic input referenced plies are possible as long as the voltage between VCC and to the VEEC pin. If low, the LT1993-10 is enabled and VEE is 5V. draws typically 100mA of supply current. If high, the
V
LT1993-10 is disabled and draws typically 250µA.
EEA, VEEB, VEEC (Pins 4, 9, 12):
Negative Power Supply (Normally Tied to Ground). All three pins must be tied
–INA, –INB (Pins 14, 13):
Negative Inputs. These pins to the same voltage. Split supplies are possible as long are normally tied together. These inputs may be DC- or as the voltage between VCC and VEE is 5V. If these pins AC-coupled. If the inputs are AC-coupled, they will self- are not tied to ground, bypass each pin with 1000pF and bias to the voltage applied to the VOCM pin. 0.1µF capacitors as close to the package as possible.
+INA, +INB (Pins 16, 15):
Positive Inputs. These pins
+OUT, –OUT (Pins 5, 8):
Outputs (Unfiltered). These are normally tied together. These inputs may be DC- or pins are high bandwidth, low-impedance outputs. The AC-coupled. If the inputs are AC-coupled, they will self- DC output voltage at these pins is set to the voltage bias to the voltage applied to the VOCM pin. applied at VOCM.
Exposed Pad (Pin 17):
Tie the pad to VEEC (Pin 12). If split supplies are used, DO NOT tie the pad to ground. Rev C 10 For more information www.analog.com Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information DC Electrical Characteristics AC Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Application Package Description Revision History Typical Application Related Parts