Datasheet LTC3779 (Analog Devices) - 31

LTC3779
APPLICATIONS INFORMATION
3. I2R losses are predicted from the DC resistances of
Checking Transient Response
the fuse (if used), MOSFET, inductor and current sense The regulator loop response can be checked by looking at resistor. In continuous mode, the average output the load current transient response. Switching regulators current flows through L and RSENSE, but is chopped take several cycles to respond to a step in DC (resistive) between the topside MOSFET and the synchronous load current. When a load step occurs, V MOSFET. If the two MOSFETs have approximately the OUT shifts by an amount equal to ∆I same R LOAD • ESR, where ESR is the effective DS(ON), then the resistance of one MOSFET series resistance of C can simply be summed with the resistances of L and OUT. ∆ILOAD also begins to charge or discharge C R OUT generating the feedback error signal that SENSE to obtain I2R losses. For example, if each forces the regulator to adapt to the current change and RDS(ON) = 10mΩ, RL = 10mΩ, RSENSE = 5mΩ, then return V the total resistance is 25mΩ. This results in losses OUT to its steady-state value. During this recovery time V ranging from 0.6% to 2% as the output current OUT can be monitored for excessive overshoot or ringing, which would indicate a stability problem. The increases from 3A to 15A for a 12V output. availability of the ITH pin not only allows optimization of Efficiency varies as the inverse square of VOUT for control loop behavior but also provides a DC-coupled and the same external components and output power AC-filtered closed-loop response test point. The DC step, level. The combined effects of increasingly lower rise time and settling at this test point truly reflects the output voltages and higher currents required by closed-loop response. Assuming a predominantly second high performance digital systems is not doubling order system, phase margin and/or damping factor can be but quadrupling the importance of loss terms in the estimated using the percentage of overshoot seen at this switching regulator system! pin. The bandwidth can also be estimated by examining the rise time at the pin. 4. Transition losses apply only to the topside MOSFET(s), and become significant only when operating at high The ITH external components shown in the Typical input voltages (typically 15V or greater). Transition Application circuit will provide an adequate starting point losses can be estimated from: for most applications. The ITH series RC-CC filter sets the dominant pole-zero loop compensation. The values can Transition Loss = (1.7) V 2 IN • IO(MAX) • CRSS • f be modified slightly (from 0.5 to 2 times their suggested Other hidden losses such as copper trace and internal values) to optimize transient response once the final PC battery resistances can account for an additional 5% to layout is done and the particular output capacitor type 10% efficiency degradation in portable systems. It is very and value have been determined. The output capacitors important to include these system level losses during the need to be selected because the various types and values design phase. The internal battery and fuse resistance determine the loop gain and phase. An output current losses can be minimized by making sure that CIN has pulse of 20% to 80% of full-load current having a rise adequate charge storage and very low ESR at the switching time of 1μs to 10μs will produce output voltage and ITH frequency. A 25W supply will typically require a minimum of pin waveforms that will give a sense of the overall loop 20μF to 40μF of capacitance having a maximum of 20mΩ to stability without breaking the feedback loop. 50mΩ of ESR. Other losses including Schottky conduction losses during dead time and inductor core losses generally account for less than 2% total additional loss. Rev A For more information www.analog.com 31 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS