Datasheet ADP2381 (Analog Devices) - 3

制造商Analog Devices
描述20 V, 6 A Synchronous Step-Down Regulator with Low-Side Driver
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Data Sheet. ADP2381. SPECIFICATIONS. Table 1. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet ADP2381 SPECIFICATIONS Table 1 Parameter Symbol Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADP2381 SPECIFICATIONS
VIN = 12 V, TJ = −40°C to +125°C for min/max specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
PVIN PVIN Voltage Range V 4.5 20 V PVIN Quiescent Current I No switching 2 2.8 3.5 mA Q Shutdown Current I EN/SS = GND 80 130 170 µA SHDN PVIN Undervoltage Lockout Threshold PVIN rising 4.3 4.5 V PVIN falling 3.7 3.9 V FB FB Regulation Voltage V 0°C < T < 85°C 0.594 0.6 0.606 V FB J −40°C < T < +125°C 0.591 0.6 0.609 V J FB Bias Current I 0.01 0.1 µA FB ERROR AMPLIFIER (EA) Transconductance g 360 500 620 µS m EA Source Current I 40 60 80 µA SOURCE EA Sink Current I 40 60 80 µA SINK INTERNAL REGULATOR (VREG) VREG Voltage V V = 12 V, I = 50 mA 7.6 8 8.4 V VREG PVIN VREG Dropout Voltage V = 12 V, I = 50 mA 350 mV PVIN VREG Regulator Current Limit 65 100 135 mA SW High-Side On Resistance1 V − V = 5 V 44 70 mΩ BST SW High-Side Peak Current Limit 7.7 9.6 11.5 A Negative Current-Limit Threshold Voltage2 20 mV SW Minimum On Time t 120 170 ns MIN_ON SW Minimum Off Time t 200 300 ns MIN_OFF LOW-SIDE DRIVER (LD) Rising Time2 t C = 2.2 nF; see Figure 17 20 ns R DL Falling Time2 t C = 2.2 nF; see Figure 20 10 ns F DL Sourcing Resistor 4 6 Ω Sinking Resistor 2 3.5 Ω BST Bootstrap Voltage V 4.5 5 5.7 V BOOT OSCILLATOR (RT PIN) Switching Frequency f RT pin connected to GND 210 290 360 kHz SW RT pin open 400 550 690 kHz R = 100 kΩ 425 500 570 kHz OSC Switching Frequency Range f 250 1400 kHz SW SYNC Synchronization Range 250 1400 kHz SYNC Minimum Pulse Width 100 ns SYNC Minimum Off Time 100 ns SYNC Input High Voltage 1.3 V SYNC Input Low Voltage 0.4 V EN/SS Enable Threshold 0.5 V Internal Soft Start 1500 Clock cycles SS Pin Pull-Up Current I 2.6 3.3 4 µA SS_UP Rev. 0 | Page 3 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Schematic of Design Example External Components Recommendation Circuit Board Layout Recommendations Typical Application Circuits Outline Dimensions Ordering Guide