Datasheet ADP2386 (Analog Devices) - 22

制造商Analog Devices
描述20 V, 6 A, Synchronous Step-Down DC-to-DC Regulator
页数 / 页24 / 22 — ADP2386. Data Sheet. CIRCUIT BOARD LAYOUT RECOMMENDATIONS. VIN. PVIN. …
修订版C
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ADP2386. Data Sheet. CIRCUIT BOARD LAYOUT RECOMMENDATIONS. VIN. PVIN. BST. CIN. VOUT. PGOOD. COUT. SYNC. TOP. COMP. BOT. VREG. RT C. GND PGND. CSS

ADP2386 Data Sheet CIRCUIT BOARD LAYOUT RECOMMENDATIONS VIN PVIN BST CIN VOUT PGOOD COUT SYNC TOP COMP BOT VREG RT C GND PGND CSS

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ADP2386 Data Sheet CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Good printed circuit board (PCB) layout is essential for obtaining Connect the exposed GND pad of the ADP2386 to a large, the best performance from the ADP2386. Poor PCB layout can external copper ground plane to maximize its power degrade the output regulation, as well as the electromagnetic dissipation capability and minimize junction temperature. interference (EMI) and electromagnetic compatibility (EMC) In addition, connect the exposed SW pad to the SW pins performance. Figure 36 shows an example of a good PCB layout of the ADP2386, using short, wide traces; or connect the for the ADP2386. For optimum layout, refer to the following exposed SW pad to a large copper plane of the switching guidelines: node for high current flow. Use separate analog ground planes and power ground Place the feedback resistor divider network as close as planes. Connect the ground reference of sensitive analog possible to the FB pin to prevent noise pickup. Minimize circuitry, such as output voltage divider components, to the length of the trace that connects the top of the feedback analog ground. In addition, connect the ground reference resistor divider to the output while keeping the trace away of power components, such as input and output capacitors, from the high current traces and the switching node to to power ground. Connect both ground planes to the avoid noise pickup. To further reduce noise pickup, place exposed GND pad of the ADP2386. an analog ground plane on either side of the FB trace and Place the input capacitor, inductor, and output capacitor as ensure that the trace is as short as possible to reduce the close as possible to the IC, and use short traces. parasitic capacitance pickup. Ensure that the high current loop traces are as short and as
ADP2386
wide as possible. Make the high current path from the input
VIN PVIN BST
capacitor through the inductor, the output capacitor, and the
CIN C EN BST
power ground plane back to the input capacitor as short as
L VOUT PGOOD SW
possible. To accomplish this, ensure that the input and output
COUT R SYNC TOP
capacitors share a common power ground plane.
FB
In addition, ensure that the high current path from the power
RT COMP R
ground plane through the inductor and output capacitor
BOT R VREG SS C
back to the power ground plane is as short as possible by
RT C GND PGND VREG CSS CC
tying the PGND pins of the ADP2386 to the PGND plane 033 1- 1 as close as possible to the input and output capacitors. 2 10 Figure 35. High Current Path in the PCB Circuit
ANALOG GROUND PLANE P C P C C T C R U S L S L C C U RBOT D R P PVIN C O N O NI S Y T G N V S S R P E P COMP PVIN RTOP FB GND INPUT INPUT PVIN BYPASS BULK VREG CAP CAP PVIN CVREG BST GND + CBST SW SW SW SW PGND SW D D D D D W S N N N N N G G G G G P P P P P INDUCTOR POWER GROUND PLANE OUTPUT CAPACITOR VOUT VIA
4
BOTTOM LAYER TRACE
-03 1 1
COPPER PLANE
2 10 Figure 36. Recommended PCB Layout Rev. C | Page 22 of 24 Document Outline Features Applications Typical Applications Circuit General Description Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Precision Enable/Shutdown Internal Regulator (VREG) Bootstrap Circuitry Oscillator Synchronization Soft Start Power Good Peak Current-Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Programming the Input Voltage UVLO Compensation Design ADIsimPower Design Tool Design Example Output Voltage Setting (Design Example) Frequency Setting Inductor Selection (Design Example) Output Capacitor Selection (Design Example) Compensation Components Soft Start Time Program Input Capacitor Selection (Design Example) Recommended External Components Circuit Board Layout Recommendations Typical Applications Circuits Outline Dimensions Ordering Guide