Datasheet ADP2311 (Analog Devices) - 4

制造商Analog Devices
描述Dual 1 A, 18 V, Synchronous Step-Down Regulator with Fail-Safe Voltage Monitoring
页数 / 页20 / 4 — ADP2311. Data Sheet. SPECIFICATIONS. Table 1. Parameter. Symbol. Test …
修订版B
文件格式/大小PDF / 698 Kb
文件语言英语

ADP2311. Data Sheet. SPECIFICATIONS. Table 1. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

ADP2311 Data Sheet SPECIFICATIONS Table 1 Parameter Symbol Test Conditions/Comments Min Typ Max Unit

该数据表的模型线

文件文字版本

ADP2311 Data Sheet SPECIFICATIONS
PVIN1 = PVIN2 = 12 V, TJ = −40°C to +125°C, unless otherwise noted.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
POWER INPUT PVIN1, PVIN2 pins Power Input Voltage Range VPVIN 4.5 18 V Quiescent Current (PVIN1 + PVIN2) IQ No switching, FB1 = FB2 = 0.65 V 1.2 1.5 mA Shutdown Current (PVIN1 + PVIN2) ISHDN EN = GND 10 20 µA PVINx Undervoltage Lockout Threshold PVINx Rising 4.2 4.5 V PVINx Falling 3.5 3.7 V FEEDBACK FB1, FB2 pins FBx Regulation Voltage VFB TJ = 0°C to +85°C 0.594 0.6 0.606 V TJ = −40°C to +125°C 0.591 0.6 0.609 V FBx Bias Current IFB 0.01 0.1 µA INTERNAL REGULATOR VREG pin VREG Voltage 4.7 5 5.3 V Dropout Voltage IVREG = 5 mA 300 mV Regulator Current Limit 30 50 70 mA MOSFET ON RESISTANCE RDSON Pin to pin measurements High-Side On Resistance VBST to VSW = 5 V 110 158 mΩ Low-Side On Resistance VREG = 5 V 60 90 mΩ CURRENT LIMIT High-Side Peak Current Limit 1.6 2 2.4 A Low-Side Source Current Limit 1.9 2.6 3.1 A Low-Side Sink Current Limit 0.5 1 A Hiccup Time 4096 Cycles SWITCH NODE SW1, SW2 pins SWx Minimum On Time tMIN_ON ISW = 0.5 A 100 ns SWx Minimum Off Time tMIN_OFF 165 ns PWM SWITCHING FREQUENCY fSW 250 300 350 kHz SOFT START TIME tSS 512 Cycles ENABLE EN pin EN Rising Threshold 1.2 1.28 V EN Falling Threshold 1.02 1.1 V EN Source Current EN voltage below falling threshold 5 µA EN voltage above rising threshold 1 µA POWER-ON RESET POR pin Power-On Reset Threshold Falling threshold (VFB1 and VFB2) 93.5 95 96.5 % Power-On Reset Hysteresis 1.5 % Power-On Reset Default Deglitch Time 1.7 ms POR Leakage Current VPOR = 5 V 0.1 1 µA POR Output Low Voltage IPOR = 1 mA 65 90 mV POWER FAIL INPUT AND OUTPUT PFI and PFO pins Power Fail Input Threshold VPFI Rising threshold 0.591 0.6 0.609 V Power Fail Input Hysteresis VPFI_HYST 25 33 mV Power Fail Deglitch Time 8 Cycles PFI Leakage Current VPFI = 1.2 V 10 50 nA PFO Leakage Current VPFO = 5 V 0.1 1 µA PFO Output Low Voltage IPFO = 1 mA 65 90 mV Rev. B | Page 4 of 20 Document Outline Features Applications Typical Application Circuit General Description Revision History Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme Precision Enable/Shutdown Internal Regulator (VREG) Bootstrap Circuitry Soft Start Peak Current-Limit and Short-Circuit Protection Power-On Reset (POR) TIMER Pin Configuration Power Fail Comparator Voltage Monitor Comparator (VM2) Watchdog Timer Power-Up and Power-Down Sequence Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Inductor Selection Output Capacitor Selection Application Circuit Outline Dimensions Ordering Guide