Datasheet ADP2165, ADP2166 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 5.5 V, 6 A, High Efficiency, Step-Down DC-to-DC Regulators with Output Tracking |
| 页数 / 页 | 23 / 6 — ADP2165/ADP2166. Data Sheet. ABSOLUTE MAXIMUM RATINGS. THERMAL … |
| 修订版 | B |
| 文件格式/大小 | PDF / 679 Kb |
| 文件语言 | 英语 |
ADP2165/ADP2166. Data Sheet. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table 2. Parameter. Rating. Table 3. Thermal Resistance
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ADP2165/ADP2166 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Rating
θJA is specified for the worst-case conditions, that is, a device PVIN, AVIN, EN, PGOOD, FB −0.3 V to +6 V soldered in a circuit board (4-layer, JEDEC standard board) for SW −1 V to +6 V surface-mount packages. BST SW + 6 V
Table 3. Thermal Resistance
SS, COMP, TRK, VREG, SYNC, RT −0.3 V to +6 V
Package Type θJA Unit
PGND to GND −0.3 V to +0.3 V 24-Lead LFCSP 38.3 °C/W Operating Junction Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020
ESD CAUTION
Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 6 of 23 Document Outline Features Applications General Description Typical Application Circuit Revision History Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme PWM Mode Enable/Shutdown Internal Regulator (VREG) Bootstrap Circuitry Oscillator and Synchronization Soft Start Tracking Power-Good (PGOOD) Peak Current-Limit and Short-Circuit Protection Overvoltage Protection Undervoltage Lockout Thermal Shutdown Applications Information ADIsimPower Design Tool Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Compensation Design Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Printed Circuit Board Layout Recommendations Reference Designs Outline Dimensions Ordering Guide
θJA is specified for the worst-case conditions, that is, a device PVIN, AVIN, EN, PGOOD, FB −0.3 V to +6 V soldered in a circuit board (4-layer, JEDEC standard board) for SW −1 V to +6 V surface-mount packages. BST SW + 6 V
Table 3. Thermal Resistance
SS, COMP, TRK, VREG, SYNC, RT −0.3 V to +6 V
Package Type θJA Unit
PGND to GND −0.3 V to +0.3 V 24-Lead LFCSP 38.3 °C/W Operating Junction Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020
ESD CAUTION
Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 6 of 23 Document Outline Features Applications General Description Typical Application Circuit Revision History Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme PWM Mode Enable/Shutdown Internal Regulator (VREG) Bootstrap Circuitry Oscillator and Synchronization Soft Start Tracking Power-Good (PGOOD) Peak Current-Limit and Short-Circuit Protection Overvoltage Protection Undervoltage Lockout Thermal Shutdown Applications Information ADIsimPower Design Tool Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Compensation Design Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Printed Circuit Board Layout Recommendations Reference Designs Outline Dimensions Ordering Guide