Datasheet HMC905LP3E (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | 6 GHz Low Noise Programmable Divider (N = 1 - 4) |
| 页数 / 页 | 10 / 2 — HMC905LP3E. 6 GHz LOW NOISE PROGRAMMABLE. DIVIDER (N = 1 to 4). … |
| 文件格式/大小 | PDF / 675 Kb |
| 文件语言 | 英语 |
HMC905LP3E. 6 GHz LOW NOISE PROGRAMMABLE. DIVIDER (N = 1 to 4). Electrical Specifications, T = +25° C, Vcc = +3.3V, Z. o = 50Ω
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HMC905LP3E
v01.0414
6 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Electrical Specifications, T = +25° C, Vcc = +3.3V, Z A o = 50Ω
(Continued) 4 Parameter Conditions Min. Typ. Max. Units Isolation SE Input to SE Output EN bit OFF -80 -30 dBc 4 Duty Cycle for Differential Mode 50 % T
Logic Inputs
T M VIH Input High Voltage 1.5 3.3 V M VIL Input Low Voltage 0 0.8 V
Power Supplies
S - S Analog Supply Vcc (Low Noise LDO for good phase noise - 3.15 3.3 3.45 V S - S R HMC860LP3E) R O Current Consumption Total current vs. BIAS and CTRL bits [1] 82 100 125 mA O T Sleep Current EN = 0V 1 µA T C [1] The bias bits combination BIAS1 BIAS0 = 1 1 is not recommended C E E T
All data plots taken on Evaluation Board (schematic on page 10) single-ended with the unused
T E
output port 50 ohms terminated, Vcc = +3.3V, Ta=+25 °C, except stated otherwise
E
Residual Phase Noise
S & D
Input Sensitivity Window Divide by 1, 2, 3 & 4 [2]
10 -110 S & D R R E 5 Recommended -120 Operating Window Div By 1 E ID Div By 2 0 (dBc/Hz) -130 Div By 3 ID IV Div By 4 IV -5 -140 NOISE Y D -10 -150 INPUT POWER (dBm) PHASE Y D C BIAS1BIAS0=01 -15 BIAS1BIAS0=00 SSB -160 C N BIAS1BIAS0=10 Operating Window N E -20 -170 0 1 2 3 4 5 6 7 10 100 1000 104 105 106 107 108 E U INPUT FREQUENCY (GHz) OFFSET FREQUENCY (Hz) U Q Q E
Phase Noise for 3 Cascaded Output Phase Noise vs. Input Power
E R
HMC905LP3E from 6 GHz VCO Divide-by-4
R F -10 -90 F -30 -100 -50 VCO IN -110 Div By 4 (dBc/Hz) -70 Div By 16 (dBc/Hz) -120 Div By 64 -90 -130 NOISE NOISE -110 -140 Source IN Div By 4 0dBm PHASE -130 PHASE -150 Div By 4 3dBm Div By 4 6dBm SSB -150 SSB -160 Div By 4 9dBm -170 -170 10 100 1000 104 105 106 107 1000 104 105 106 107 OFFSET FREQUENCY (Hz) OFFSET FREQUENCY (Hz) [2] Fin = 6 GHz, Pin = 6 dBm, CTRL = 1, BIAS1 BIAS0 = 01 Info F rmoatr p ion rfiurcne is , d hed ebly ivAe n r al y a og D n evd t ice o p s is bla eli c eve o ed t rd o b e e ras: H ccuratite tiatne M d reli iac bl reo . w Ho av wev e C er, n o o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rporation, 20 Alpha Road, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No P rd hone e r O : 7 n 81- -3li 2n 9 e a -47 t w 0 w 0 • O w rd .h e it r o t niltie n .c e ao t m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. www.analog.com
4 - 2
Application Support: Pho Trademarks and registered trademarks are the property of their respective owners. ne: 978-250-33 A 4 p 3 o plica r a tio p n S p u s p @ po h rt itt : P ite ho . n c e o : 1m -800-ANALOG-D
v01.0414
6 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Electrical Specifications, T = +25° C, Vcc = +3.3V, Z A o = 50Ω
(Continued) 4 Parameter Conditions Min. Typ. Max. Units Isolation SE Input to SE Output EN bit OFF -80 -30 dBc 4 Duty Cycle for Differential Mode 50 % T
Logic Inputs
T M VIH Input High Voltage 1.5 3.3 V M VIL Input Low Voltage 0 0.8 V
Power Supplies
S - S Analog Supply Vcc (Low Noise LDO for good phase noise - 3.15 3.3 3.45 V S - S R HMC860LP3E) R O Current Consumption Total current vs. BIAS and CTRL bits [1] 82 100 125 mA O T Sleep Current EN = 0V 1 µA T C [1] The bias bits combination BIAS1 BIAS0 = 1 1 is not recommended C E E T
All data plots taken on Evaluation Board (schematic on page 10) single-ended with the unused
T E
output port 50 ohms terminated, Vcc = +3.3V, Ta=+25 °C, except stated otherwise
E
Residual Phase Noise
S & D
Input Sensitivity Window Divide by 1, 2, 3 & 4 [2]
10 -110 S & D R R E 5 Recommended -120 Operating Window Div By 1 E ID Div By 2 0 (dBc/Hz) -130 Div By 3 ID IV Div By 4 IV -5 -140 NOISE Y D -10 -150 INPUT POWER (dBm) PHASE Y D C BIAS1BIAS0=01 -15 BIAS1BIAS0=00 SSB -160 C N BIAS1BIAS0=10 Operating Window N E -20 -170 0 1 2 3 4 5 6 7 10 100 1000 104 105 106 107 108 E U INPUT FREQUENCY (GHz) OFFSET FREQUENCY (Hz) U Q Q E
Phase Noise for 3 Cascaded Output Phase Noise vs. Input Power
E R
HMC905LP3E from 6 GHz VCO Divide-by-4
R F -10 -90 F -30 -100 -50 VCO IN -110 Div By 4 (dBc/Hz) -70 Div By 16 (dBc/Hz) -120 Div By 64 -90 -130 NOISE NOISE -110 -140 Source IN Div By 4 0dBm PHASE -130 PHASE -150 Div By 4 3dBm Div By 4 6dBm SSB -150 SSB -160 Div By 4 9dBm -170 -170 10 100 1000 104 105 106 107 1000 104 105 106 107 OFFSET FREQUENCY (Hz) OFFSET FREQUENCY (Hz) [2] Fin = 6 GHz, Pin = 6 dBm, CTRL = 1, BIAS1 BIAS0 = 01 Info F rmoatr p ion rfiurcne is , d hed ebly ivAe n r al y a og D n evd t ice o p s is bla eli c eve o ed t rd o b e e ras: H ccuratite tiatne M d reli iac bl reo . w Ho av wev e C er, n o o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rporation, 20 Alpha Road, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No P rd hone e r O : 7 n 81- -3li 2n 9 e a -47 t w 0 w 0 • O w rd .h e it r o t niltie n .c e ao t m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. www.analog.com
4 - 2
Application Support: Pho Trademarks and registered trademarks are the property of their respective owners. ne: 978-250-33 A 4 p 3 o plica r a tio p n S p u s p @ po h rt itt : P ite ho . n c e o : 1m -800-ANALOG-D