link to page 118 link to page 118 link to page 118 link to page 118 KSZ8794CNX9.0SELECTION OF ISOLATION TRANSFORMER One simple 1:1 isolation transformer is needed at the line interface. An isolation transformer with integrated common- mode choke is recommended for exceeding FCC requirements at line side. Request to separate the center taps of RX/ TX at chip side. The IEEE 802.3u standard for 100BASE-TX assumes a transformer loss of 0.5 dB. For the transmit line transformer, insertion loss of up to 1.3 dB can be compensated by increasing the line drive current by means of reducing the ISET resistor value. Table 9-1 gives recommended transformer characteristics. TABLE 9-1:TRANSFORMER SELECTION CRITERIACharacteristicsValueTest Condition Turns Ratio 1 CT : 1 CT — Open-Circuit Inductance (min.) 350 µH 100 mV, 100 kHz, 8 mA Insertion Loss (max.) 1.1 dB 0.1 MHz to 100 MHz HIPOT (min.) 1500 VRMS — Table 9-2 lists the transformer vendors that provide compatible magnetic parts for this device. TABLE 9-2:QUALIFIED MAGNETIC VENDORSNumberNumberVendors and PartsAuto MDIXVendors and PartsAuto MDIXof Portsof Ports Pulse H1164NL Yes 4 Pulse H1102 Yes 1 YCL PH406082 Yes 4 Bel Fuse S558-5999- Yes 1 U7 TDK TLA-6T718A Yes 1 YCL PT163020 Yes 1 LanKom LF-H41S Yes 1 Transpower HB726 Yes 1 Datatronic NT79075 Yes 1 Delta LF8505 Yes 1 10.0SELECTION OF REFERENCE CRYSTAL Table 10-1 lists the typical reference crystal characteristics for this device. TABLE 10-1:TYPICAL REFERENCE CRYSTAL CHARACTERISTICSCharacteristicsValue Frequency 25.00000 MHz Frequency Tolerance (max.) ≤ ±50 ppm Load Capacitance (max.) (Note 10-1) 27 pF Series Resistance (max. ESR) 40Ω Note 10-1 Typical value varies per specific crystal specs. DS00002134A-page 118 2016 Microchip Technology Inc. Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer (PHY) 3.2 Media Access Controller (MAC) Operation 3.3 Switch Core 3.4 Power and Power Management 3.5 Interfaces 3.6 Advanced Functionality 4.0 Device Registers 4.1 Register Map 4.2 Port Registers 4.3 Advanced Control Registers 4.4 Static MAC Address Table 4.5 VLAN Table 4.6 Dynamic MAC Address Table 4.7 PME Indirect Registers 4.8 ACL Rule Table and ACL Indirect Registers 4.9 EEE Indirect Registers 4.10 Management Information Base (MIB) Counters 4.11 MIIM Registers 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Diagrams 8.0 Reset Circuit 9.0 Selection of Isolation Transformer 10.0 Selection of Reference Crystal 11.0 Package Outlines