Datasheet LT1249 (Linear Technology) - 6

LT1249
U U U PIN FUNCTIONS VSENSE (Pin 6):
This is the inverting input to the voltage capacitor in parallel with a low ESR electrolytic capacitor, amplifier. 56µF or higher is required in close proximity to IC GND.
VCC (Pin 7):
This is the supply of the chip. The LT1249 has
GTDR (Pin 8):
The MOSFET gate driver is a 1.5A fast totem a very fast gate driver required to fast charge high power pole output. It is clamped at 15V. Capacitive loads like MOSFET gate capacitance. High current spikes occur MOSFET gates may cause overshoot. A gate series resis- during charging. For good supply bypass, a 0.1µF ceramic tor of at least 5Ω will prevent the overshoot.
U U W U APPLICATIONS INFORMATION Error Amplifier Multiplier
The error amplifier has a 100dB DC gain and 1.5MHz unity- The multiplier is a current multiplier with high noise gain frequency. It is internally clamped at 12V. The nonin- immunity in a high power switching environment. The verting input is tied to the 7.5V reference. current gain is: I 2)/(200µA)2, and
Current Amplifier
M = (IAC)(IEA IEA = (VAOUT – 1.5V)/25k The multiplier output current IM flows out of the MOUT pin With a square function, because of the lower gain at light through the 4k resistor RMOUT and develops the reference power load, system stability is maintained and line current signal to the current loop that is controlled by the current distortion caused by the AC ripple fed back to the error amplifier. Current gain is the ratio of RMOUT to line current amplifier is minimized. Note that switching ripple on the sense resistor. The current amplifier is a transconductance high impedance lines could get into the multiplier from the amplifier. Typical gm is 320µmho and gain is 60dB with no I load. The inverting input is internally tied to GND. The AC pin and cause instability. The LT1249 provides an internal 25k resistor in series with the low impedance noninverting input is tied to the multiplier output. The multiplier current input so that only a capacitor from the output is internally clamped at 8V. Output resistance is I about 4M; DC loading should be avoided because it will AC pin to GND is needed to filter out the noise. Maximum multiplier output current is limited to 250µA. Figure 1 lower the gain and introduce offset voltage at the inputs shows the multiplier transfer curves. which becomes a false reference signal to the current loop and can distort line current. Note that in the current 300 averaging operation, high gain at twice the line frequency is necessary to minimize line current distortion. Because VAOUT = 6.5V VAOUT = 5V CAOUT may need to swing 5V over one line cycle at high line VAOUT = 6V condition, 11mV will be present at the inputs of the current VAOUT = 5.5V VAOUT = 4.5V amplifier if gain is rolled off to 450 at 120Hz (1nF in series µA) ( 150 VA with 10k at CA I M OUT = 4V OUT). At light load, when (IM)(RMOUT) can be less than 100mV, lower gain will distort the current loop VAOUT = 3.5V reference signal and line current. If signal gain at the VAOUT = 3V 100kHz switching frequency is too high, the system VAOUT = 2.5V behaves more like a current mode system and can cause 0 VAOUT = 2V 0 250 500 subharmonic oscillation. Therefore, the current amplifier IAC (µA) should be compensated to have a gain of less than 15 at 1249 G04 100kHz and more than 300 at 120Hz.
Figure 1. Multiplier Current IM vs IAC and VAOUT
6