Datasheet AD650 (Analog Devices) - 4

制造商Analog Devices
描述Voltage-to-Frequency and Frequency-to-Voltage Converter
页数 / 页21 / 4 — Data Sheet. AD650. SPECIFICATIONS. Table 1. AD650J/AD650A. AD650K/AD650B. …
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Data Sheet. AD650. SPECIFICATIONS. Table 1. AD650J/AD650A. AD650K/AD650B. AD650S. Model. Min. Typ. Max. Units. 0.02. 0.1. +0.015. ±75. ±200. 100. ±20

Data Sheet AD650 SPECIFICATIONS Table 1 AD650J/AD650A AD650K/AD650B AD650S Model Min Typ Max Units 0.02 0.1 +0.015 ±75 ±200 100 ±20

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Data Sheet AD650 SPECIFICATIONS
T = 25°C, VS = ±15 V, unless otherwise noted.
Table 1. AD650J/AD650A AD650K/AD650B AD650S Model Min Typ Max Min Typ Max Min Typ Max Units
DYNAMIC PERFORMANCE Full-Scale Frequency Range 1 1 1 MHz Nonlinearity1 fMAX = 10 kHz 0.002 0.005 0.002 0.005 0.002 0.005 % fMAX = 100 kHz 0.005
0.02
0.005
0.02
0.005
0.02
% fMAX = 500 kHz 0.02 0.05 0.02 0.05 0.02 0.05 % fMAX = 1 MHz 0.1 0.05
0.1
0.05
0.1
% Full-Scale Calibration Error2 100 kHz ± 5 ± 5 ± 5 % 1 MHz ± 10 ± 10 ± 10 % % of vs. Supply3 −0.015
+0.015
−0.015
+0.015
−0.015
+0.015
FSR/V vs. Temperature A, B, and S Grades at 10 kHz ±75 ±75
±75
ppm/°C at 100 kHz ±150 ±150
±200
ppm/°C J and K Grades at 10 kHz ±75 ±75 ppm/°C at 100 kHz ±150 ±150 ppm/°C BIPOLAR OFFSET CURRENT Activated by 1.24 kΩ Between Pin 4 and Pin 5 0.45 0.5 0.55 0.45 0.5 0.55 0.45 0.5 0.55 mA DYNAMIC RESPONSE Maximum Settling Time for Full-Scale Step Input 1 pulse of new frequency plus 1 μs 1 pulse of new frequency plus 1 μs 1 pulse of new frequency plus 1 μs Overload Recovery Time Step Input 1 pulse of new frequency plus 1 μs 1 pulse of new frequency plus 1 μs 1 pulse of new frequency plus 1 μs ANALOG INPUT AMPLIFIER (V/F CONVERSION) Current Input Range (Figure 4) 0 +0.6 0 +0.6 0 +0.6 mA Voltage Input Range (Figure 12) −10 0 −10 0 −10 0 V Differential Impedance 2 MΩ||10 pF 2 MΩ||10 pF 2 MΩ||10 pF Common-Mode Impedance 1000 MΩ||10 pF 1000 MΩ||10 pF 1000 MΩ||10 pF Input Bias Current Noninverting Input 40
100
40
100
40
100
nA Inverting Input ±8
±20
±8
±20
±8
±20
nA Input Offset Voltage (Trimmable to Zero)
±4 ±4 ±4
mV vs. Temperature (TMIN to TMAX) ±30 ±30 ±30 µV/°C Safe Input Voltage ±VS ±VS ±VS V COMPARATOR (F/V CONVERSION) Logic 0 Level −VS −1 −VS −1 −VS −1 V Logic 1 Level 0 +VS 0 +VS 0 +VS V Pulse Width Range4 0.1 (0.3 × tOS) 0.1 (0.3 × tOS) 0.1 (0.3 × tOS) µs Input Impedance 250 250 250 kΩ OPEN COLLECTOR OUTPUT (V/F CONVERSION) Output Voltage in Logic 0 ISINK ≤ 8 mA, TMIN to TMAX 0.4 0.4 0.4 V Output Leakage Current in Logic 1
100 100 100
nA Voltage Range5 0 36 0 36 0 36 V Rev. E | Page 3 of 20 Document Outline Features Functional Block Diagram Product Description Product Highlights Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Circuit Operation Unipolar Configuration One-Shot Timing Component Selection Bipolar V/F Unipolar V/F, Negative Input Voltage F/V Conversion High Frequency Operation Decoupling and Grounding Temperature Coefficients Nonlinearity Specification PSRR Other Circuit Considerations Applications Differential Voltage-to-Frequency Conversion Autozero Circuit Phase-Locked Loop F/V Conversion Outline Dimensions Ordering Guide