Datasheet LTC4314 (Analog Devices) - 10

制造商Analog Devices
描述Pin-Selectable, 4-Channel, 2-Wire Multiplexer with Bus Buffers
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APPLICATIONS INFORMATION. Pull-Up Resistor Value Selection. Supply Voltage Considerations in Level Translation Applications

APPLICATIONS INFORMATION Pull-Up Resistor Value Selection Supply Voltage Considerations in Level Translation Applications

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LTC4314
APPLICATIONS INFORMATION
If VCC2 is tied low, the output side rise time accelerators If VCC2 is grounded, the multiplexer pass gates are powered are disabled independent of the state of the ACC pin. Using from VCC. In this case the minimum output bus supply a combination of the ACC pin and the VCC2 voltage allows of the enabled channels should be greater than or equal the user independent control of the input and output side to VCC to prevent cross-conduction between the enabled rise time accelerators. The rise time accelerators are also output channels. This is shown in Figure 4. Grounding VCC2 internally disabled during power-up and VCC2 transitions as shown in Figure 4 disables the output side rise time as described in the Operation section, as well as during accelerators independent of the state of the ACC pin. The automatic clocking and stop bit generation for a bus stuck input rise time accelerators in this confi guration continue low recovery event. to be controlled by the ACC pin and can be enabled inde- pendently. In Figure 4, ACC is left open to obtain a high V The rise time accelerators when activated pull the bus up IL and a 3mA rise time accelerator current on the input side. to 0.9•VCC on the input side of the SDA and SCL lines. On the output side the SDAOUT and SCLOUT lines are pulled
Pull-Up Resistor Value Selection
up by the rise time accelerators to 0.8•VCC2. For VCC2 voltages approaching 2.3V, acceleration of the bus may To guarantee that the rise time accelerators are activated not be seen all the way to 0.8•V during a rising edge, the bus must rise on its own with CC2 due to the threshold voltage of the NFET pass device. a positive slew rate of at least 0.4V/μs. To achieve this, choose a maximum RBUS using equation 1:
Supply Voltage Considerations in Level Translation Applications
V ( DD,BUS(MIN) −VRTA(TH)) R (1) Care must be taken to ensure that the bus supply voltages BUS(Ω) ≤ 0.4V/µs • CBUS on the input and output sides are greater than 0.9•V CC and 0.8•VCC2 respectively to ensure that the bus is not driven RBUS is the bus pull-up resistor, VDD, BUS(MIN) the mini- above the bus supplies by the rise time accelerators. This mum bus pull-up supply voltage, VRTA(TH) the voltage at is usually accomplished in a level shifting application by which the rise time accelerator turns on, which is a func- tying VCC to the input bus supply and VCC2 to the lowest tion of ACC, and CBUS the equivalent bus capacitance. bus supply on the output side as shown in Figure 3. 3.3V 3.3V C1 C2 R1 R2 0.01μF V R4 R5 0.01μF CC VCC2 10k 10k 10k 10k SCLIN SCLIN SDAIN SDAIN ENABLE1 ENABLE1 SCLOUT1 SCLOUT1 ENABLE2 ENABLE2 SDAOUT1 SDAOUT1 ENABLE3 ENABLE3 ENABLE4 ENABLE4 •• 5V 3.3V • LTC4314 R6 R7 R3 ACC 10k 10k 10k SCLOUT4 SCLOUT4 DISCEN SDAOUT4 SDAOUT4 FAULT FAULT GND 4314 F03
Figure 3. Connection of the LTC4314 in a Level Shift Application. VCC2 is Less than or Equal to the Minimum Bus Supply Voltage on the Output Side
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