Datasheet LTC4310-1, LTC4310-2 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | Hot-Swappable I2C Isolators |
| 页数 / 页 | 20 / 4 — elecTrical characTerisTics. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 241 Kb |
| 文件语言 | 英语 |
elecTrical characTerisTics. The. denotes the specifications which apply over the full operating
该数据表的模型线
- LTC4310CDD-1#PBF LTC4310CDD-1#TRPBF LTC4310CDD-2#PBF LTC4310CDD-2#TRPBF LTC4310CMS-1#PBF LTC4310CMS-1#TRPBF LTC4310CMS-2#PBF LTC4310CMS-2#TRPBF LTC4310IDD-1#PBF LTC4310IDD-1#TRPBF LTC4310IDD-2#PBF LTC4310IDD-2#TRPBF LTC4310IMS-1#PBF LTC4310IMS-1#TRPBF LTC4310IMS-2#PBF LTC4310IMS-2#TRPBF
文件文字版本
LTC4310-1/LTC4310-2
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tMAX(TX) Maximum Time Between TXP, TXN l 0.85 1.15 1.45 ms Transmit Events tMAX(RX) Maximum Time Between RXP, RXN l 3.4 4.6 5.8 ms Receive Events
Transmit Outputs
VTX(OL) TXP, TXN Single-Ended Output Low ISINK = 100µA, VCC = 3V l 1.5 5 mV VTX(OH) TXP, TXN Single-Ended Output High 15kΩ to GND on TXP, TXN; VCC = 3V, 5.5V l 0.95 1.25 1.52 V tR(TX) TXP, TXN Output Rise Time CTXP , CTXN = 20pF l 1 3 ns tF(TX) TXP, TXN Output Fall Time CTXP , CTXN = 20pF l 1 3 ns tPWMIN(TX) TXP, TXN Minimum Transmission VCC = 3V, 5.5V l 31.5 35 39 ns Pulse Width
Receive Inputs
VRX(TH) RXP, RXN Differential High Level RXP, RXN Pins; VCC = 3V, 5.5V l 0.3 0.5 0.875 V Threshold tPWMIN(RX) RXP, RXN Minimum Received Pulse VCC = 3V, 5.5V l 30 ns Width RRX(IN) RXP, RXN Differential Input Resistance l 13 16.5 20 kΩ
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings receive a message on the RXP and RXN pins, plus the time the LTC4310 may cause permanent damage to the device. Exposure to any Absolute requires to process the message and pass the low to the data and clock Maximum Rating condition for extended periods may affect device buffers, plus the time required by the buffers to drive their bus pins below reliability and lifetime. 0.5 • VCC.
Note 2.
Guaranteed by design, not tested in production.
Note 4.
All currents into pins are positive, all voltages are referenced to
Note 3.
SDA, SCL high-to-low propagation delay is measured from the GND unless otherwise specified. beginning of a new received message telling the LTC4310 to drive its SDA,
Note 5.
Internal control circuitry prevents the rise time accelerators from SCL pins from high to low, to when the SDA, SCL lines have fallen below activating until the rising edge rate control circuitry is off. 0.5 • VCC. It includes approximately 87ns required for an LTC4310 to 431012fa 4 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tMAX(TX) Maximum Time Between TXP, TXN l 0.85 1.15 1.45 ms Transmit Events tMAX(RX) Maximum Time Between RXP, RXN l 3.4 4.6 5.8 ms Receive Events
Transmit Outputs
VTX(OL) TXP, TXN Single-Ended Output Low ISINK = 100µA, VCC = 3V l 1.5 5 mV VTX(OH) TXP, TXN Single-Ended Output High 15kΩ to GND on TXP, TXN; VCC = 3V, 5.5V l 0.95 1.25 1.52 V tR(TX) TXP, TXN Output Rise Time CTXP , CTXN = 20pF l 1 3 ns tF(TX) TXP, TXN Output Fall Time CTXP , CTXN = 20pF l 1 3 ns tPWMIN(TX) TXP, TXN Minimum Transmission VCC = 3V, 5.5V l 31.5 35 39 ns Pulse Width
Receive Inputs
VRX(TH) RXP, RXN Differential High Level RXP, RXN Pins; VCC = 3V, 5.5V l 0.3 0.5 0.875 V Threshold tPWMIN(RX) RXP, RXN Minimum Received Pulse VCC = 3V, 5.5V l 30 ns Width RRX(IN) RXP, RXN Differential Input Resistance l 13 16.5 20 kΩ
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings receive a message on the RXP and RXN pins, plus the time the LTC4310 may cause permanent damage to the device. Exposure to any Absolute requires to process the message and pass the low to the data and clock Maximum Rating condition for extended periods may affect device buffers, plus the time required by the buffers to drive their bus pins below reliability and lifetime. 0.5 • VCC.
Note 2.
Guaranteed by design, not tested in production.
Note 4.
All currents into pins are positive, all voltages are referenced to
Note 3.
SDA, SCL high-to-low propagation delay is measured from the GND unless otherwise specified. beginning of a new received message telling the LTC4310 to drive its SDA,
Note 5.
Internal control circuitry prevents the rise time accelerators from SCL pins from high to low, to when the SDA, SCL lines have fallen below activating until the rising edge rate control circuitry is off. 0.5 • VCC. It includes approximately 87ns required for an LTC4310 to 431012fa 4 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts