Datasheet TC1321 (Microchip) - 3

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TC1321 1.0 ELECTRICAL
*Stresses above those listed under “Absolute Maximum
CHARACTERISTICS
Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the
Absolute Maximum Ratings*
operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for Supply Voltage (VDD) ..+6V extended periods may affect device reliability. Voltage on any Pin ..(VSS – 0.3V) to (VDD + 0.3V) Current on any Pin ..±50 mA Package Thermal Resistance (JA)... 330°C C/W Operating Temperature (TA)...See Below Storage Temperature (TSTG)...-65°C to +150°C
ELECTRICAL SPECIFICATIONS Electrical Characteristics:
VDD = 2.7V to 5.5V, -40°C  TA  +85°C, VREF = 1.2 V unless otherwise noted.
Symbol Parameter Min Typ Max Unit Test Conditions Power Supply
VDD Supply Voltage 2.7 — 5.5 V IDD Operating Current — 350 500 µA VDD = 5.5V, VREF = 1.2V Serial Port Inactive
(Note 1)
IDD- Standby Supply Current — 0.1 1 µA VDD = 3.3V STANDBY Serial Port Inactive
(Note 1) Static Performance - Analog Section
Resolution — — 10 Bits INL Integral Non-Linearity at FS, TA = +25°C — — ±4.0 LSB (
Note 2
) FSE Full Scale Error — — ±3 %FS DNL Differential Non-Linearity, TA = +25°C -1 — +2 LSB All Codes
(Note 2 )
VOS Offset Error at VOUT — ±0.3 ±8 mV (
Note 2
) TCVOS Offset Error Tempco at VOUT — 10 — µv/°C PSRR Power Supply Rejection Ratio — 80 — dB VDD at DC VREF Voltage Reference Range 0 — VDD – 1.2 V IREF Reference Input Leakage Current — — ±1.0 µA VSW Voltage Swing 0 — VREF V VREF  (VDD – 1.2V) ROUT Output Resistance @ VOUT — 5.0 — ROUT () IOUT Output Current (Source or Sink) — 2 — mA ISC Output Short-Circuit Current — 30 50 mA Source VDD = 5.5V — 20 50 mA Sink
Dynamic Performance
SR Voltage Output Slew Rate — 0.8 — V/µs tSETTLE Output Voltage Full Scale Settling Time — 10 — µs tWU Wake-up Time — 20 — µs Digital Feed Through and Crosstalk — 5 — nV-s SDA = VDD, SCL = 100 kHz
Serial Port Interface
VIH Logic Input High 2.4 — VDD V VIL Logic Input Low — — 0.6 — VOL SDA Output Low — — 0.4 V IOL = 3 mA (Sinking Current) — — 0.6 V IOL = 6 mA
Note 1:
SDA and SCL must be connected to VDD or VSS.
2:
Measured at VOUT 50 mV referred to VSS to avoid output buffer clipping.  2010 Microchip Technology Inc. DS21387C-page 3 Document Outline TC1321 10-Bit Digital-to-Analog Converter with Two-Wire Interface 1.0 Electrical Characteristics 2.0 Pin Descriptions TABLE 2-1: Pin Function Table 2.1 External Voltage Reference Input (VREF) 2.2 Bi-Directional Serial Data Input and Output (SDA) 2.3 Serial Clock Input (SCL) 2.4 Supply Power Ground (VSS) 2.5 Output (VOUT) 2.6 No Connection (NC) 2.7 Output (DAC-OUT) 2.8 Positive Power Supply Input (VDD) 3.0 Detailed Description 3.1 Reference Input 3.2 Output Amplifier 3.3 Standby Mode TABLE 3-1: Standby Mode Operation 3.4 SMBus Slave Address FIGURE 3-1: SMBus/I2C Protocols. 4.0 Serial Port Operation TABLE 4-1: TC1321 Serial Bus Conventions 4.1 START Condition (START) 4.2 Address Byte 4.3 Acknowledge (ACK) 4.4 Data Byte 4.5 Stop Condition (STOP) FIGURE 4-1: SMBus/I2CTiming Diagrams. 4.6 Register Set and Programmer’s Model TABLE 4-2: TC1321 Command Set (READ_BYTE and WRITE_BYTE) TABLE 4-3: Configuration Register (CONFIG), 8-Bit, Read/Write TABLE 4-4: Data Register (DATA), 10-Bit, Read/Write 4.7 Register Set Summary TABLE 4-5: TC1321 Register Set Summary 5.0 Packaging Information 5.1 Package Marking Information Appendix A: Revision History Product Identification System Worldwide Sales and Service