Datasheet MCP6N11 (Microchip) - 37

MCP6N11 6.0 PACKAGING INFORMATION 6.1 Package Marking Information
8-Lead SOIC (150 mil)
(MCP6N11)
Example 6N11001E SN^^ 1 e3 121 256 NNN
Note:
The example is for a MCP6N11-001 part. 8-Lead TDFN (2×3)
(MCP6N11)
Example
Device Code
MCP6N11-001 AAQ MCP6N11-002 AAR AAQ MCP6N11-005 AAS 121 25 MCP6N11-010 AAT MCP6N11-100 AAU
Note:
Applies to 8-Lead 2x3 TDFN
Legend:
XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator ( ) e3 can be found on the outer packaging for this package.
Note
: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2011 Microchip Technology Inc. DS25073A-page 37 Document Outline 500 kHz, 800 µA Instrumentation Amplifier TABLE 1: Key Differentiating Specifications 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Digital Electrical Specifications TABLE 1-4: Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Common Mode Input Overdrive Recovery Timing Diagram. FIGURE 1-2: Differential Mode Input Overdrive Recovery Timing Diagram. FIGURE 1-3: Output Overdrive Recovery Timing Diagram. FIGURE 1-4: POR Timing Diagram. FIGURE 1-5: EN/CAL Timing Diagram. 1.4 DC Test Circuits FIGURE 1-6: Test Circuit for Common Mode (Input Offset). TABLE 1-5: Selecting RF and RG FIGURE 1-7: Test Circuit for Differential Mode. TABLE 1-6: Selecting RF and RG 1.5 Explanation of DC Error Specs FIGURE 1-8: Input Offset Error vs. Common Mode Input Voltage. FIGURE 1-9: Differential Input Error vs. Differential Input Voltage. 2.0 Typical Performance Curves 2.1 DC Voltages and Currents FIGURE 2-1: Normalized Input Offset Voltage, with GMIN = 1 to 10. FIGURE 2-2: Normalized Input Offset Voltage, with GMIN = 100. FIGURE 2-3: Normalized Input Offset Voltage Drift, with GMIN = 1 to 10. FIGURE 2-4: Normalized Input Offset Voltage Drift, with GMIN = 100. FIGURE 2-5: Normalized Input Offset Voltage vs. Power Supply Voltage, with VCM = 0V and GMIN = 1 to 10. FIGURE 2-6: Normalized Input Offset Voltage vs. Power Supply Voltage, with VCM = 0V and GMIN = 100. FIGURE 2-7: Normalized Input Offset Voltage vs. Power Supply Voltage, with VCM = VDD and GMIN = 1 to 10. FIGURE 2-8: Normalized Input Offset Voltage vs. Power Supply Voltage, with VCM = VDD and GMIN = 100. FIGURE 2-9: Normalized Input Offset Voltage vs. Output Voltage, with GMIN = 1 to 10. FIGURE 2-10: Normalized Input Offset Voltage vs. Output Voltage, with GMIN = 100. FIGURE 2-11: Input Common Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-12: Normalized Input Offset Voltage vs. Common Mode Voltage, with VDD = 1.8V and GMIN = 1 to 10. FIGURE 2-13: Normalized Input Offset Voltage vs. Common Mode Voltage, with VDD = 1.8V and GMIN = 100. FIGURE 2-14: Normalized Input Offset Voltage vs. Common Mode Voltage, with VDD = 5.5V and GMIN = 1 to 10. FIGURE 2-15: Normalized Input Offset Voltage vs. Common Mode Voltage, with VDD = 5.5V and GMIN = 100. FIGURE 2-16: Normalized CMRR and PSRR vs. Ambient Temperature. FIGURE 2-17: Normalized DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-18: The MCP6N11 Shows No Phase Reversal vs. Common Mode Voltage. FIGURE 2-19: Normalized Differential Mode Voltage Range vs. Ambient Temperature. FIGURE 2-20: Normalized Differential Input Error vs. Differential Voltage, with GMIN = 1. FIGURE 2-21: Normalized Differential Input Error vs. Differential Voltage, with GMIN = 2 to 100. FIGURE 2-22: The MCP6N11 Shows No Phase Reversal vs. Differential Voltage, with VDD = 5.5V. FIGURE 2-23: Input Bias and Offset Currents vs. Ambient Temperature, with VDD = +5.5V. FIGURE 2-24: Input Bias Current vs. Input Voltage (below VSS). FIGURE 2-25: Input Bias and Offset Currents vs. Common Mode Input Voltage, with TA = +85°C. FIGURE 2-26: Input Bias and Offset Currents vs. Common Mode Input Voltage, with TA = +125°C. FIGURE 2-27: Output Voltage Headroom vs. Output Current. FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-29: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-30: Supply Current vs. Power Supply Voltage. FIGURE 2-31: Supply Current vs. Common Mode Input Voltage. 2.2 Frequency Response FIGURE 2-32: CMRR vs. Frequency. FIGURE 2-33: PSRR vs. Frequency. FIGURE 2-34: Normalized Open-Loop Gain vs. Frequency. FIGURE 2-35: Normalized Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-36: Closed-Loop Output Impedance vs. Frequency. FIGURE 2-37: Gain Peaking vs. Normalized Capacitive Load. 2.3 Noise FIGURE 2-38: Normalized Input Noise Voltage Density vs. Frequency. FIGURE 2-39: Normalized Input Noise Voltage Density vs. Input Common Mode Voltage, with f = 100 Hz. FIGURE 2-40: Normalized Input Noise Voltage Density vs. Input Common Mode Voltage, with f = 10 kHz. FIGURE 2-41: Normalized Input Noise Voltage vs. Time, with GMIN = 1 to 10. FIGURE 2-42: Normalized Input Noise Voltage vs. Time, with GMIN = 100. 2.4 Time Response FIGURE 2-43: Small Signal Step Response. FIGURE 2-44: Large Signal Step Response. FIGURE 2-45: Slew Rate vs. Ambient Temperature. FIGURE 2-46: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-47: Common Mode Input Overdrive Recovery Time vs. Normalized Gain. FIGURE 2-48: Differential Input Overdrive Recovery Time vs. Normalized Gain. FIGURE 2-49: Output Overdrive Recovery Time vs. Normalized Gain. FIGURE 2-50: The MCP6N11 Shows No Phase Reversal vs. Common Mode Input Overdrive, with VDD = 5.5V. FIGURE 2-51: The MCP6N11 Shows No Phase Reversal vs. Differential Input Overdrive, with VDD = 5.5V. 2.5 Enable/Calibration and POR Responses FIGURE 2-52: EN/CAL and Output Voltage vs. Time, with VDD = 1.8V. FIGURE 2-53: EN/CAL and Output Voltage vs. Time, with VDD = 5.5V FIGURE 2-54: EN/CAL Hysteresis vs. Ambient Temperature. FIGURE 2-55: EN/CAL Turn On Time vs. Ambient Temperature. FIGURE 2-56: Power Supply On and Off and Output Voltage vs. Time. FIGURE 2-57: POR Trip Voltages and Hysteresis vs. Temperature. FIGURE 2-58: Quiescent Current in Shutdown vs. Power Supply Voltage. FIGURE 2-59: Output Leakage Current vs. Output Voltage. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Signal Inputs 3.2 Analog Feedback Input 3.3 Analog Reference Input 3.4 Analog Output 3.5 Power Supply Pins 3.6 Digital Enable and VOS Calibration Input 3.7 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Basic Performance FIGURE 4-1: Standard Circuit. FIGURE 4-2: MCP6N11 Block Diagram. FIGURE 4-3: DC Bias Resistors. 4.2 Functional Blocks FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs Against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. FIGURE 4-7: Input Voltage Ranges. 4.3 Applications Tips FIGURE 4-8: Output Resistor, RISO stabilizes large capacitive loads. FIGURE 4-9: Recommended RISO Values for Capacitive Loads. FIGURE 4-10: Simple Gain Circuit with Parasitic Capacitances. 4.4 Typical Applications FIGURE 4-11: Difference Amplifier. FIGURE 4-12: Difference Amplifier with Very Large Common Mode Component. FIGURE 4-13: High Side Current Detector. FIGURE 4-14: Wheatstone Bridge Amplifier. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration Board 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Revision A (October 2011) Product Identification System Trademarks Worldwide Sales and Service