Datasheet AD7715 (Analog Devices) - 38

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Data Sheet AD7715 TEMPERATURE MEASUREMENT
resistances RL1 and RL4, but these simply shift the common- Another application area for the AD7715 is in temperature mode voltage. There is no voltage drop across lead resistances measurement. Figure 15 outlines a connection from a thermo- RL2 and RL3 as the input current to the AD7715 is very low. The couple to the AD7715. In this application, the AD7715 is operated lead resistances present a small source impedance so it would in its buffered mode to allow large decoupling capacitors on the not generally be necessary to turn on the buffer on the AD7715. front end to eliminate any noise pickup that there may have If the buffer is required, the common-mode voltage should be been in the thermocouple leads. When the AD7715 is operated set accordingly by inserting a small resistance between the bottom in buffered mode, it has a reduced common-mode range. To place end of the RTD and AGND of the AD7715. In the application the differential voltage from the thermocouple on a suitable shown in Figure 16, an external 400 μA current source provides common-mode voltage, the AIN(−) input of the AD7715 is the excitation current for the PT100 and it also generates the biased up at the reference voltage, 2.5 V. reference voltage for the AD7715 via the 6.25 kΩ resistor. Varia- tions in the excitation current do not affect the circuit as both the Figure 16 shows another temperature measurement application input voltage and the reference voltage vary ratiometrically with for the AD7715. In this case, the transducer is an resistive tem- the excitation current. However, the 6.25 kΩ resistor must have perature device (RTD), a PT100. The arrangement is a 4-lead a low temperature coefficient to avoid errors in the reference RTD configuration. There are voltage drops across the lead voltage over temperature.
5V AVDD DVDD AD7715 THERMOCOUPLE JUNCTION R AIN(+) CHARGE BALANCING ADC R AIN(–) BUFFER PGA AUTO-ZEROED DIGITAL Σ-∆ FILTER C C A = 1 TO 128 MODULATOR MCLK IN +5V CLOCK GENERATION +VIN SERIAL INTERFACE MCLK OUT V REF192 OUT REF IN(+) REGISTER BANK RESET REF IN(–) DRDY GND AGND
15 0
DGND DOUT DIN CS SCLK
9- 51 08 Figure 15. Thermocouple Measurement Using the AD7715
+5V 400µA AVDD DVDD REF IN(+) R 6.25kΩ L1 REF IN(–) AD7715 RL2 AIN(+) CHARGE BALANCING ADC RTD BUFFER PGA AUTO-ZEROED DIGITAL RL3 AIN(–) Σ-∆ FILTER A = 1 TO 128 MODULATOR RL4 MCLK IN CLOCK GENERATION AGND MCLK OUT SERIAL INTERFACE REGISTER BANK RESET DGND DRDY
16 -0
DOUT DIN CS SCLK
19 85 0 Figure 16. RTD Measurement Using the AD7715 Rev. E | Page 37 of 40 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7715-5 AD7715-3 TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY ON-CHIP REGISTERS COMMUNICATIONS REGISTER (RS1, RS0 = 0, 0) SETUP REGISTER (RS1, RS0 = 0, 1); POWER ON/RESET STATUS: 28 HEX TEST REGISTER (RS1, RS0 = 1, 0) DATA REGISTER (RS1, RS0 = 1, 1) OUTPUT NOISE AD7715-5 AD7715-3 CALIBRATION SEQUENCES CIRCUIT DESCRIPTION ANALOG INPUT Analog Input Ranges Input Sample Rate Bipolar/Unipolar Inputs REFERENCE INPUT DIGITAL FILTERING Filter Characteristics Post-Filtering ANALOG FILTERING CALIBRATION Self-Calibration System Calibration Span and Offset Limits Power-Up and Calibration USING THE AD7715 CLOCKING AND OSCILLATOR CIRCUIT SYSTEM SYNCHRONIZATION RESET INPUT STANDBY MODE ACCURACY DRIFT CONSIDERATIONS POWER SUPPLIES Supply Current Grounding and Layout Evaluating the AD7715 Performance DIGITAL INTERFACE CONFIGURING THE AD7715 MICROCONTROLLER/MICROPROCESSOR INTERFACING AD7715 TO 68HC11 INTERFACE AD7715 TO 8XC51 INTERFACE AD7715 TO ADSP-2184N/ADSP-2185N/ ADSP-2186N/ADSP-2187N/ADSP-2188N/ ADSP-2189N INTERFACE CODE FOR SETTING UP THE AD7715 C CODE FOR INTERFACING AD7715 TO 68HC11 APPLICATIONS INFORMATION PRESSURE MEASUREMENT TEMPERATURE MEASUREMENT SMART TRANSMITTERS OUTLINE DIMENSIONS ORDERING GUIDE