Datasheet AD7671 (Analog Devices) - 3

制造商Analog Devices
描述16-Bit, 1 MSPS CMOS ADC
页数 / 页25 / 3 — AD7671–SPECIFICATIONS (–40. C to +85. C, AVDD = DVDD = 5 V, OVDD = 2.7 V …
修订版C
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文件语言英语

AD7671–SPECIFICATIONS (–40. C to +85. C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.). Parameter

AD7671–SPECIFICATIONS (–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.) Parameter

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文件文字版本

AD7671–SPECIFICATIONS (–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.) Parameter Conditions Min Typ Max Unit
RESOLUTION 16 Bits ANALOG INPUT Voltage Range V ± IND – VINGND 4 REF, 0 V to 4 REF, ± 2 REF (See Table I) Common-Mode Input Voltage VINGND –0.1 +0.5 V Analog Input CMRR fIN = 100 kHz 74 dB Input Impedance See Table I THROUGHPUT SPEED Complete Cycle In Warp Mode 1 ms Throughput Rate In Warp Mode 1 1000 kSPS Time between Conversions In Warp Mode 1 ms Complete Cycle In Normal Mode 1.25 ms Throughput Rate In Normal Mode 0 800 kSPS Complete Cycle In Impulse Mode 1.5 ms Throughput Rate In Impulse Mode 0 666 kSPS DC ACCURACY Integral Linearity Error –2.5 +2.5 LSB1 No Missing Codes 16 Bits Transition Noise 0.7 LSB Bipolar Zero Error2, T ± MIN to TMAX 5 V Range, Normal or –45 +45 LSB Impulse Modes Other Range or Mode –0.1 +0.1 % of FSR Bipolar Full-Scale Error2, TMIN to TMAX –0.38 +0.38 % of FSR Unipolar Zero Error2, TMIN to TMAX –0.18 +0.18 % of FSR Unipolar Full-Scale Error2, TMIN to TMAX –0.76 +0.76 % of FSR Power Supply Sensitivity AVDD = 5 V ± 5% ±9.5 LSB AC ACCURACY Signal-to-Noise fIN = 20 kHz 89 90 dB3 fIN = 250 kHz 90 dB Spurious-Free Dynamic Range fIN = 250 kHz 100 dB Total Harmonic Distortion fIN = 20 kHz –100 –96 dB fIN = 250 kHz –100 dB Signal-to-(Noise+Distortion) fIN = 20 kHz 88.5 90 dB fIN = 250 kHz, –60 dB Input 30 dB –3 dB Input Bandwidth 9.6 MHz SAMPLING DYNAMICS Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-Scale Step 250 ns REFERENCE External Reference Voltage Range 2.3 2.5 AVDD – 1.85 V External Reference Current Drain 1 MSPS Throughput 200 mA DIGITAL INPUTS Logic Levels VIL –0.3 +0.8 V VIH +2.0 DVDD + 0.3 V IIL –1 +1 mA IIH –1 +1 mA DIGITAL OUTPUTS Data Format Parallel or Serial 16-Bit Pipeline Delay Conversion Results Available Immediately after Completed Conversion VOL ISINK = 1.6 mA 0.4 V VOH ISOURCE = –570 mA OVDD – 0.6 V –2– REV. C Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PulSAR Selection PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTION DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) Full-Scale Error Bipolar Zero Error Unipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal-to-(Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Driver Amplifier Choice Voltage Reference Input Scaler Reference Input (Bipolar Input Ranges) Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE SLAVE SERIAL INTERFACE External Clock MASTER SERIAL INTERFACE Internal Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7671 Performance OUTLINE DIMENSIONS Revision History