Datasheet AD9218 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 10-Bit, 40/65/80/105 MSPS 3 V Dual A/D Converter |
| 页数 / 页 | 29 / 10 — AD9218. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. ) SB. (M A A A A A A … |
| 修订版 | C |
| 文件格式/大小 | PDF / 887 Kb |
| 文件语言 | 英语 |
AD9218. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. ) SB. (M A A A A A A A A. GND 1. 36 D1A. AINA 2. 35 D0A. AINA 3. 34 GND. DFS/GAIN 4
该数据表的模型线
文件文字版本
link to page 9 link to page 9
AD9218 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ) SB AC D (M A A A A A A A A D DD V EN V GN D9 D8 D7 D6 D5 D4 D3 D2 48 47 46 45 44 43 42 41 40 39 38 37 GND 1 36 D1A AINA 2 35 D0A AINA 3 34 GND DFS/GAIN 4 33 VDD REFINA 5 32 GND AD9218 REFOUT 6 31 VD TOP VIEW REFINB 7 (Not to Scale) 30 VD S1 8 29 GND S2 9 28 VDD AINB 10 27 GND AINB 11 26 D0B GND 12 25 D1B 13 14 15 16 17 18 19 20 21 22 23 24 D B B B B B B B B V D C DD 9 B V GN D8 D7 D6 D5 D4 D3 D2
5
EN ) D
-00
SB
01 20
(M
0 Figure 5. Pin Configuration
Table 7. Pin Function Descriptions Pin Number Mnemonic Description
1, 12, 16, 27, 29, GND Ground. 32, 34, 45 2 AINA Analog Input for Channel A. 3 A A Analog Input for Channel A (Complementary). IN 4 DFS/GAIN Data Format Select and Analog Input Gain Mode. Low = offset binary output available, 1 V p-p supported; high = twos complement output available, 1 V p-p supported; floating = offset binary output available, 2 V p-p supported; set to VREF = twos complement output available, 2 V p-p supported. 5 REFINA Reference Voltage Input for Channel A. 6 REFOUT Internal Reference Voltage. 7 REFINB Reference Voltage Input for Channel B. 8 S1 User Select No. 1. See Table 6. 9 S2 User Select No. 2. See Table 6. 10 A B Analog Input for Channel B (Complementary). IN 11 AINB Analog Input for Channel B. 13, 30, 31, 48 VD Analog Supply (3 V). 14 ENCB Clock Input for Channel B. 15, 28, 33, 46 V DD Digital Supply (2.5 V to 3.6 V). 17 to 26 D9B to D0B Digital Output for Channel B (D9B = MSB). 35 to 44 D0A to D9A Digital Output for Channel A (D9A = MSB). 47 ENCA Clock Input for Channel A. Rev. C | Page 9 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION USING THE AD9218 ENCODE INPUT DIGITAL OUTPUTS ANALOG INPUT VOLTAGE REFERENCE TIMING USER SELECT OPTIONS APPLICATION INFORMATION AD9218/AD9288 CUSTOMER PCB BOM EVALUATION BOARD POWER CONNECTOR ANALOG INPUTS VOLTAGE REFERENCE CLOCKING DATA OUTPUTS DATA FORMAT/GAIN TIMING TROUBLESHOOTING OUTLINE DIMENSIONS ORDERING GUIDE
AD9218 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ) SB AC D (M A A A A A A A A D DD V EN V GN D9 D8 D7 D6 D5 D4 D3 D2 48 47 46 45 44 43 42 41 40 39 38 37 GND 1 36 D1A AINA 2 35 D0A AINA 3 34 GND DFS/GAIN 4 33 VDD REFINA 5 32 GND AD9218 REFOUT 6 31 VD TOP VIEW REFINB 7 (Not to Scale) 30 VD S1 8 29 GND S2 9 28 VDD AINB 10 27 GND AINB 11 26 D0B GND 12 25 D1B 13 14 15 16 17 18 19 20 21 22 23 24 D B B B B B B B B V D C DD 9 B V GN D8 D7 D6 D5 D4 D3 D2
5
EN ) D
-00
SB
01 20
(M
0 Figure 5. Pin Configuration
Table 7. Pin Function Descriptions Pin Number Mnemonic Description
1, 12, 16, 27, 29, GND Ground. 32, 34, 45 2 AINA Analog Input for Channel A. 3 A A Analog Input for Channel A (Complementary). IN 4 DFS/GAIN Data Format Select and Analog Input Gain Mode. Low = offset binary output available, 1 V p-p supported; high = twos complement output available, 1 V p-p supported; floating = offset binary output available, 2 V p-p supported; set to VREF = twos complement output available, 2 V p-p supported. 5 REFINA Reference Voltage Input for Channel A. 6 REFOUT Internal Reference Voltage. 7 REFINB Reference Voltage Input for Channel B. 8 S1 User Select No. 1. See Table 6. 9 S2 User Select No. 2. See Table 6. 10 A B Analog Input for Channel B (Complementary). IN 11 AINB Analog Input for Channel B. 13, 30, 31, 48 VD Analog Supply (3 V). 14 ENCB Clock Input for Channel B. 15, 28, 33, 46 V DD Digital Supply (2.5 V to 3.6 V). 17 to 26 D9B to D0B Digital Output for Channel B (D9B = MSB). 35 to 44 D0A to D9A Digital Output for Channel A (D9A = MSB). 47 ENCA Clock Input for Channel A. Rev. C | Page 9 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION USING THE AD9218 ENCODE INPUT DIGITAL OUTPUTS ANALOG INPUT VOLTAGE REFERENCE TIMING USER SELECT OPTIONS APPLICATION INFORMATION AD9218/AD9288 CUSTOMER PCB BOM EVALUATION BOARD POWER CONNECTOR ANALOG INPUTS VOLTAGE REFERENCE CLOCKING DATA OUTPUTS DATA FORMAT/GAIN TIMING TROUBLESHOOTING OUTLINE DIMENSIONS ORDERING GUIDE