Datasheet AD9248 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | Dual 14-Bit, 20/40/65 MSPS, 3 V Analog-to-Digital Converter |
| 页数 / 页 | 49 / 4 — AD9248. SPECIFICATIONS DC SPECIFICATIONS. Table 1. Test. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 1.1 Mb |
| 文件语言 | 英语 |
AD9248. SPECIFICATIONS DC SPECIFICATIONS. Table 1. Test. AD9248BST/BCP-20. AD9248BST/BCP-40. AD9248BST/BCP-65. Parameter. Temp. Level. Min
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AD9248 SPECIFICATIONS DC SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B; AIN = −0.5 dBFS differential input, 1.0 V internal reference, TMIN to TMAX, DCS enabled, unless otherwise noted.
Table 1. Test AD9248BST/BCP-20 AD9248BST/BCP-40 AD9248BST/BCP-65 Parameter Temp Level Min Typ Max Min Typ Max Min Typ Max Unit
RESOLUTION Full VI 14 14 14 Bits ACCURACY No Missing Codes Guaranteed Full VI 14 14 14 Bits Offset Error 25°C I ±0.2 ±1.3 ±0.2 ±1.3 ±0.2 ±1.3 % FSR Gain Error1 Full IV ±0.25 ±2.2 ±0.3 ±2.4 ±0.5 ±2.5 % FSR Differential Nonlinearity (DNL)2 Full V ±0.65 ±0.65 ±0.7 LSB 25°C IV ±0.6 ±1.0 ±0.6 ±1.0 ±0.65 ±1.0 LSB Integral Nonlinearity (INL)2 Full V ±2.7 ±2.7 ±2.8 LSB 25°C IV ±2.3 ±4.5 ±2.3 ±4.5 ±2.4 ±4.5 LSB TEMPERATURE DRIFT Offset Error Full V ±2 ±2 ±3 ppm/°C Gain Error1 Full V ±12 ±12 ±12 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage Error (1 V Mode) Full VI ±5 ±35 ±5 ±35 ±5 ±35 mV Load Regulation @ 1.0 mA Full V 0.8 0.8 0.8 mV Output Voltage Error (0.5 V Mode) Full V ±2.5 ±2.5 ±2.5 mV Load Regulation @ 0.5 mA Full V 0.1 0.1 0.1 mV INPUT REFERRED NOISE Input Span = 1 V 25°C V 2.1 2.1 2.1 LSB rms Input Span = 2.0 V 25°C V 1.05 1.05 1.05 LSB rms ANALOG INPUT Input Span = 1.0 V Full IV 1 1 1 V p-p Input Span = 2.0 V Full IV 2 2 2 V p-p Input Capacitance3 Full V 7 7 7 pF REFERENCE INPUT RESISTANCE Full V 7 7 7 kΩ POWER SUPPLIES Supply Voltages AVDD Full IV 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 V DRVDD Full IV 2.25 3.0 3.6 2.25 3.0 3.6 2.25 3.0 3.6 V Supply Current IAVDD2 Full V 60 110 200 mA IDRVDD2 Full V 5 11 16 mA PSRR Full V ±0.01 ±0.01 ±0.01 % FSR POWER CONSUMPTION DC Input4 Full V 180 330 600 mW Sine Wave Input2 Full VI 190 217 360 400 640 700 mW Standby Power5 Full V 2.0 2.0 2.0 mW Rev. B | Page 3 of 48 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT AND CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS TIMING DATA FORMAT VOLTAGE REFERENCE Internal Reference Connection External Reference Operation AD9248 LQFP EVALUATION BOARD CLOCK CIRCUITRY ANALOG INPUTS REFERENCE CIRCUITRY DIGITAL CONTROL LOGIC OUTPUTS LQFP EVALUATION BOARD BILL OF MATERIALS (BOM) LQFP EVALUATION BOARD SCHEMATICS LQFP PCB LAYERS DUAL ADC LFCSP PCB POWER CONNECTOR ANALOG INPUTS OPTIONAL OPERATIONAL AMPLIFIER CLOCK VOLTAGE REFERENCE DATA OUTPUTS LFCSP EVALUATION BOARD BILL OF MATERIALS (BOM) LFCSP PCB SCHEMATICS LFCSP PCB LAYERS THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
AD9248 SPECIFICATIONS DC SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B; AIN = −0.5 dBFS differential input, 1.0 V internal reference, TMIN to TMAX, DCS enabled, unless otherwise noted.
Table 1. Test AD9248BST/BCP-20 AD9248BST/BCP-40 AD9248BST/BCP-65 Parameter Temp Level Min Typ Max Min Typ Max Min Typ Max Unit
RESOLUTION Full VI 14 14 14 Bits ACCURACY No Missing Codes Guaranteed Full VI 14 14 14 Bits Offset Error 25°C I ±0.2 ±1.3 ±0.2 ±1.3 ±0.2 ±1.3 % FSR Gain Error1 Full IV ±0.25 ±2.2 ±0.3 ±2.4 ±0.5 ±2.5 % FSR Differential Nonlinearity (DNL)2 Full V ±0.65 ±0.65 ±0.7 LSB 25°C IV ±0.6 ±1.0 ±0.6 ±1.0 ±0.65 ±1.0 LSB Integral Nonlinearity (INL)2 Full V ±2.7 ±2.7 ±2.8 LSB 25°C IV ±2.3 ±4.5 ±2.3 ±4.5 ±2.4 ±4.5 LSB TEMPERATURE DRIFT Offset Error Full V ±2 ±2 ±3 ppm/°C Gain Error1 Full V ±12 ±12 ±12 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage Error (1 V Mode) Full VI ±5 ±35 ±5 ±35 ±5 ±35 mV Load Regulation @ 1.0 mA Full V 0.8 0.8 0.8 mV Output Voltage Error (0.5 V Mode) Full V ±2.5 ±2.5 ±2.5 mV Load Regulation @ 0.5 mA Full V 0.1 0.1 0.1 mV INPUT REFERRED NOISE Input Span = 1 V 25°C V 2.1 2.1 2.1 LSB rms Input Span = 2.0 V 25°C V 1.05 1.05 1.05 LSB rms ANALOG INPUT Input Span = 1.0 V Full IV 1 1 1 V p-p Input Span = 2.0 V Full IV 2 2 2 V p-p Input Capacitance3 Full V 7 7 7 pF REFERENCE INPUT RESISTANCE Full V 7 7 7 kΩ POWER SUPPLIES Supply Voltages AVDD Full IV 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 V DRVDD Full IV 2.25 3.0 3.6 2.25 3.0 3.6 2.25 3.0 3.6 V Supply Current IAVDD2 Full V 60 110 200 mA IDRVDD2 Full V 5 11 16 mA PSRR Full V ±0.01 ±0.01 ±0.01 % FSR POWER CONSUMPTION DC Input4 Full V 180 330 600 mW Sine Wave Input2 Full VI 190 217 360 400 640 700 mW Standby Power5 Full V 2.0 2.0 2.0 mW Rev. B | Page 3 of 48 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT AND CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS TIMING DATA FORMAT VOLTAGE REFERENCE Internal Reference Connection External Reference Operation AD9248 LQFP EVALUATION BOARD CLOCK CIRCUITRY ANALOG INPUTS REFERENCE CIRCUITRY DIGITAL CONTROL LOGIC OUTPUTS LQFP EVALUATION BOARD BILL OF MATERIALS (BOM) LQFP EVALUATION BOARD SCHEMATICS LQFP PCB LAYERS DUAL ADC LFCSP PCB POWER CONNECTOR ANALOG INPUTS OPTIONAL OPERATIONAL AMPLIFIER CLOCK VOLTAGE REFERENCE DATA OUTPUTS LFCSP EVALUATION BOARD BILL OF MATERIALS (BOM) LFCSP PCB SCHEMATICS LFCSP PCB LAYERS THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE