Datasheet AD9228 (Analog Devices) - 10

制造商Analog Devices
描述Quad, 12-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
页数 / 页57 / 10 — Data Sheet. AD9228. N – 1. VIN ± x. tEH. tEL. CLK–. CLK+. tCPD. DCO–. …
修订版F
文件格式/大小PDF / 1.6 Mb
文件语言英语

Data Sheet. AD9228. N – 1. VIN ± x. tEH. tEL. CLK–. CLK+. tCPD. DCO–. DCO+. FCO. FRAME. FCO–. FCO+. tPD. tDATA. D – x. LSB. D10. N – 9. N – 8. D + x

Data Sheet AD9228 N – 1 VIN ± x tEH tEL CLK– CLK+ tCPD DCO– DCO+ FCO FRAME FCO– FCO+ tPD tDATA D – x LSB D10 N – 9 N – 8 D + x

该数据表的模型线

文件文字版本

Data Sheet AD9228 N – 1 VIN ± x tA N tEH tEL CLK– CLK+ tCPD DCO– DCO+ t t FCO FRAME FCO– FCO+ tPD tDATA D – x LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 LSB D0
1
N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 8 N – 8
04 7-
D + x
72 05 Figure 4. 12-Bit Data Serial Stream, LSB First Rev. E | Page 9 of 56 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagrams Absolute Maximum Ratings Thermal Impedance ESD Caution Pin Configuration and Function Descriptions Equivalent Circuits Typical Performance Characteristics Theory of Operation Analog Input Considerations Differential Input Configurations Single-Ended Input Configuration Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs and Timing SDIO/ODM Pin SCLK/DTP Pin CSB Pin RBIAS Pin Voltage Reference Internal Reference Operation External Reference Operation Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Evaluation Board Power Supplies Input Signals Output Signals Default Operation and Jumper Selection Settings Alternative Analog Input Drive Configuration Outline Dimensions Ordering Guide