Datasheet AD9211 (Analog Devices) - 5

制造商Analog Devices
描述10-Bit, 200 MSPS/250 MSPS/300 MSPS, 1.8 V Analog-to-Digital Converter
页数 / 页29 / 5 — AD9211. AC SPECIFICATIONS1. Table 2. AD9211-200. AD9211-250. AD9211-300. …
文件格式/大小PDF / 1.3 Mb
文件语言英语

AD9211. AC SPECIFICATIONS1. Table 2. AD9211-200. AD9211-250. AD9211-300. Parameter. Temp. Min. Typ. Max. Unit

AD9211 AC SPECIFICATIONS1 Table 2 AD9211-200 AD9211-250 AD9211-300 Parameter Temp Min Typ Max Unit

该数据表的模型线

文件文字版本

link to page 5 link to page 5
AD9211 AC SPECIFICATIONS1
AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = −40°C, TMAX = +85°C, fIN = −1.0 dBFS, full scale = 1.25 V, DCS enabled, unless otherwise noted.
Table 2. AD9211-200 AD9211-250 AD9211-300 Parameter
2
Temp Min Typ Max Min Typ Max Min Typ Max Unit
SNR fIN = 10 MHz 25°C 59.0 59.5 58.9 59.4 58.6 59.2 dB Full 58.9 58.7 57.5 dB fIN = 70 MHz 25°C 58.9 59.3 58.8 59.3 58.5 59.1 dB Full 58.8 58.7 57.0 dB fIN = 170 MHz 25°C 58.5 59.0 58.5 59.0 58.3 58.7 dB Full 58.4 58.4 57.0 dB SINAD fIN = 10 MHz 25°C 59.0 59.5 58.9 59.4 58.6 59.1 dB Full 58.9 58.7 57.3 dB fIN = 70 MHz 25°C 58.8 59.2 58.8 59.2 58.4 59.0 dB Full 58.7 58.6 57.0 dB fIN = 170 MHz 25°C 58.2 58.8 58.2 59.0 58.2 58.8 dB Full 58.1 58.1 56.7 dB EFFECTIVE NUMBER OF BITS (ENOB) fIN = 10 MHz 25°C 9.8 9.7 9.7 Bits fIN = 70 MHz 25°C 9.7 9.7 9.7 Bits fIN = 170 MHz 25°C 9.6 9.7 9.6 Bits WORST HARMONIC (Second or Third) fIN = 10 MHz 25°C −85 −78 −86 −79 −80 −75 dBc Full −78 −77 −70 dBc fIN = 70 MHz 25°C −77 −75 −80 −76 −80 −74 dBc Full −75 −74 −67 dBc fIN = 170 MHz 25°C −77 −72 −79 −70 −80 −73 dBc Full −72 −70 −67 dBc WORST OTHER (SFDR Excluding Second and Third) fIN = 10 MHz 25°C −86 −82 −82 −80 −82 −75 dBc Full −82 −77 −70 dBc fIN = 70 MHz 25°C −83 −81 −82 −79 −80 −75 dBc Full −81 −77 −71 dBc fIN = 170 MHz 25°C −81 −74 −79 −77 −80 −75 dBc Full −74 −75 −70 dBc TWO-TONE IMD 140.2 MHz/141.3 MHz @ −7 dBFS 25°C −78 −87 −81 dBc 170.2 MHz/171.3 MHz @ −7 dBFS 25°C −86 −82 −82 dBc ANALOG INPUT BANDWIDTH 25°C 700 700 700 MHz 1 All ac specifications tested by driving CLK+ and CLK− differentially. 2 See the AN-835 application note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed. Rev. 0 | Page 4 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT AND VOLTAGE REFERENCE Differential Input Configurations CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations POWER DISSIPATION AND POWER-DOWN MODE DIGITAL OUTPUTS Digital Outputs and Timing Output Data Rate and Pinout Configuration Out-of-Range (OR) TIMING RBIAS AD9211 CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI MEMORY MAP READING THE MEMORY MAP TABLE RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS OUTLINE DIMENSIONS ORDERING GUIDE