Datasheet AD7193 (Analog Devices) - 29

AD7193 Data Sheet Bit Location Bit Name Description
CON4 BUF Enables the buffer on the analog inputs. If BUF is set, the analog inputs are buffered, allowing the user to place source impedances on the front end without contributing gain errors to the system. When the buffer is enabled, it requires some head- room; therefore, the voltage on any input pin must be limited to 250 mV within the power supply rails. If cleared, the analog inputs are unbuffered, lowering the power consumption of the device. With the buffer disabled, the voltage on the analog input pins can be from 50 mV below AGND to 50 mV above AVDD. CON3 U/B Polarity select bit. When this bit is set, unipolar operation is selected. When this bit is cleared, bipolar operation is selected. CON2 to CON0 G2 to G0 Gain select bits. These bits are written by the user to select the ADC input range as follows:
G2 G1 G0 Gain ADC Input Range (2.5 V Reference)
0 0 0 1 ±2.5 V 0 0 1 Reserved 0 1 0 Reserved 0 1 1 8 ±312.5 mV 1 0 0 16 ±156.2 mV 1 0 1 32 ±78.125 mV 1 1 0 64 ±39.06 mV 1 1 1 128 ±19.53 mV
Table 23. Channel Selection (Pseudo Bit = 0) Channel Enable Bits in the Configuration Register Channel Enabled Status Calibration Positive Negative Register Register Short TEMP CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 Input AIN(+) Input AIN(−) Bits CHD[3:0] Pair
1 AIN1 AIN2 0000 0 1 AIN3 AIN4 0001 1 1 AIN5 AIN6 0010 2 1 AIN7 AIN8 0011 3 1 AIN1 AIN2 0100 0 1 AIN3 AIN4 0101 1 1 AIN5 AIN6 0110 2 1 AIN7 AIN8 0111 3 1 Temperature sensor 1000 1 AIN2 AIN2 1001 0
Table 24. Channel Selection (Pseudo Bit = 1) Channel Enable Bits in the Configuration Register Channel Enabled Status Positive Negative Register Calibration Short TEMP CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 Input AIN(+) Input AIN(−) Bits CHD[3:0] Register Pair
1 AIN1 AINCOM 0000 0 1 AIN2 AINCOM 0001 1 1 AIN3 AINCOM 0010 2 1 AIN4 AINCOM 0011 3 1 AIN5 AINCOM 0100 4 1 AIN6 AINCOM 0101 4 1 AIN7 AINCOM 0110 4 1 AIN8 AINCOM 0111 4 1 Temperature sensor 1000 1 AINCOM AINCOM 1001 0 Rev. E | Page 28 of 56 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS Circuit and Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RMS NOISE AND RESOLUTION SINC4 CHOP DISABLED SINC3 CHOP DISABLED FAST SETTLING ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 000 STATUS REGISTER RS2, RS1, RS0 = 000; Power-On/Reset = 0x80 MODE REGISTER RS2, RS1, RS0 = 001; Power-On/Reset = 0x080060 CONFIGURATION REGISTER RS2, RS1, RS0 = 010; Power-On/Reset = 0x000117 DATA REGISTER RS2, RS1, RS0 = 011; Power-On/Reset = 0x000000 ID REGISTER RS2, RS1, RS0 = 100; Power-On/Reset = 0xX2 GPOCON REGISTER RS2, RS1, RS0 = 101; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 110; Power-On/Reset = 0x800000) FULL-SCALE REGISTER RS2, RS1, RS0 = 111; Power-On/Reset = 0x5XXXX0 ADC CIRCUIT INFORMATION OVERVIEW Analog Inputs Multiplexer PGA Reference Detect Burnout Currents Sigma-Delta (Σ-Δ) ADC and Filter Serial Interface Clock Bridge Power-Down Switch Temperature Sensor Digital Outputs Calibration ANALOG INPUT CHANNEL PROGRAMMABLE GAIN ARRAY (PGA) REFERENCE REFERENCE DETECT BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS CHANNEL SEQUENCER DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read RESET SYSTEM SYNCHRONIZATION ENABLE PARITY CLOCK BRIDGE POWER-DOWN SWITCH TEMPERATURE SENSOR LOGIC OUTPUTS CALIBRATION DIGITAL FILTER SINC4 FILTER (CHOP DISABLED) Sinc4 Output Data Rate/Settling Time Sinc4 Zero Latency Sinc4 50 Hz/60 Hz Rejection SINC3 FILTER (CHOP DISABLED) Sinc3 Output Data Rate and Settling Time Sinc3 Zero Latency Sinc3 50 Hz/60 Hz Rejection CHOP ENABLED (SINC4 FILTER) Output Data Rate and Settling Time (Sinc4 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc4 Chop Enabled) CHOP ENABLED (SINC3 FILTER) Output Data Rate and Settling Time (Sinc3 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc3 Chop Enabled) FAST SETTLING MODE (SINC4 FILTER) Output Data Rate and Settling Time, Sinc4 Filter 50 Hz/60 Hz Rejection, Sinc4 Filter FAST SETTLING MODE (SINC3 FILTER) Output Data Rate and Settling Time, Sinc3 Filter 50 Hz/60 Hz Rejection, Sinc3 Filter FAST SETTLING MODE (CHOP ENABLED) SUMMARY OF FILTER OPTIONS GROUNDING AND LAYOUT APPLICATIONS INFORMATION FLOWMETER OUTLINE DIMENSIONS ORDERING GUIDE