Datasheet AD7915, AD7916 (Analog Devices) - 5

制造商Analog Devices
描述16-Bit, 1 MSPS/500 kSPS PulSAR ADCs in MSOP/LFCSP
页数 / 页26 / 5 — Data Sheet. AD7915/AD7916. TIMING SPECIFICATIONS. Table 3. Parameter. …
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Data Sheet. AD7915/AD7916. TIMING SPECIFICATIONS. Table 3. Parameter. Symbol Min Typ Max Unit. Y% VIO1. X% VIO1. tDELAY. V 2. VIL

Data Sheet AD7915/AD7916 TIMING SPECIFICATIONS Table 3 Parameter Symbol Min Typ Max Unit Y% VIO1 X% VIO1 tDELAY V 2 VIL

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Data Sheet AD7915/AD7916 TIMING SPECIFICATIONS
TA = −40°C to +125°C, VDD = 2.37 V to 2.63 V, VIO = 2.3 V to 5.5 V, CLOAD_SDO = 20 pF, unless otherwise noted. See Figure 2 for voltage levels.
Table 3. Parameter Symbol Min Typ Max Unit
AD7915 Throughput Rate 1 MSPS Conversion Time: CNV Rising Edge to Data Available tCONV 500 710 ns Acquisition Time tACQ 290 ns Time Between Conversions tCYC 1 μs AD7916 Throughput Rate 500 kSPS Conversion Time: CNV Rising Edge to Data Available tCONV 0.5 1.6 μs Acquisition Time tACQ 400 ns Time Between Conversions tCYC 2 μs CNV Pulse Width (CS Mode) tCNVH 10 ns SCK Period (CS Mode) tSCK VIO Above 4.5 V 10.5 ns VIO Above 3 V 12 ns VIO Above 2.7 V 13 ns VIO Above 2.3 V 15 ns SCK Period (Chain Mode) tSCK VIO Above 4.5 V 11.5 ns VIO Above 3 V 13 ns VIO Above 2.7 V 14 ns VIO Above 2.3 V 16 ns SCK Low Time tSCKL 4.5 ns SCK High Time tSCKH 4.5 ns SCK Falling Edge to Data Remains Valid tHSDO 3 ns SCK Falling Edge to Data Valid Delay tDSDO VIO Above 4.5 V 9.5 ns VIO Above 3 V 11 ns VIO Above 2.7 V 12 ns VIO Above 2.3 V 14 ns CNV or SDI Low to SDO D15 MSB Valid (CS Mode) tEN VIO Above 3 V 10 ns VIO Above 2.3 V 15 ns CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode) tDIS 20 ns SDI Valid Setup Time from CNV Rising Edge (CS Mode) tSSDICNV 5 ns SDI Valid Hold Time from CNV Rising Edge (CS Mode) tHSDICNV 2 ns SCK Valid Setup Time from CNV Rising Edge (Chain Mode) tSSCKCNV 5 ns SCK Valid Hold Time from CNV Rising Edge (Chain Mode) tHSCKCNV 5 ns SDI Valid Setup Time from SCK Falling Edge (Chain Mode) tSSDISCK 2 ns SDI Valid Hold Time from SCK Falling Edge (Chain Mode) tHSDISCK 3 ns SDI High to SDO High (Chain Mode with Busy Indicator) tDSDOSDI 15 ns
Y% VIO1 X% VIO1 tDELAY tDELAY V 2 IH V 2 IH 2 V 2 VIL IL 1FOR VIO ≤ 3.0V, X = 90 AND Y = 10; FOR VIO > 3.0V, X = 70 AND Y = 30. 2
03
MINIMUM V
0
IH AND MAXIMUM VIL USED. SEE THE DIGITAL INPUTS
3-
SPECIFICATIONS IN TABLE 3.
58 12 Figure 2. Voltage Levels for Timing Rev. 0 | Page 5 of 26 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATIONS CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE SINGLE TO DIFFERENTIAL DRIVER VOLTAGE REFERENCE INPUT POWER SUPPLY DIGITAL INTERFACE MODE, 3-WIRE, WITHOUT BUSY INDICATOR MODE 3-WIRE, WITH BUSY INDICATOR MODE, 4-WIRE, WITHOUT BUSY INDICATOR MODE 4-WIRE WITH BUSY INDICATOR CHAIN MODE, WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATIONS INFORMATION INTERFACING TO BLACKFIN DSP LAYOUT EVALUATING AD7915/AD7916 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE NOTES