Datasheet ATmega164A - Summary (Microchip) - 5

1. Description
The Atmel® ATmega164A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega164A achieves throughputs close to 1MIPS per MHz. This empowers system designer to optimize the device for power consumption versus processing speed. The Atmel AVR® core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in a single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega164A provides the following features: 16Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 512bytes EEPROM, 1Kbytes SRAM, 32 general purpose I/O lines, 32 general purpose working registers, Real Time Counter (RTC), three flexible Timer/Counters with compare modes and PWM, two serial programmable USARTs , one byte-oriented 2-wire Serial Interface (I2C), a 8- channel 10-bit ADC with optional differential input stage with programmable gain, a programmable Watchdog Timer with internal Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for accessing the On-chip Debug system and programming and six software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low power consumption. In Extended Standby mode, both the main oscillator and the asynchronous timer continue to run. Atmel offers the QTouch® library for embedding capacitive touch buttons, sliders and wheels functionality into AVR microcontrollers. The patented charge-transfer signal acquisition offers robust sensing and includes fully debounced reporting of touch keys and includes Adjacent Key Suppression® (AKS™) technology for unambiguous detection of key events. The easy-to-use QTouch Suite toolchain allows you to explore, develop and debug your own touch applications. The device is manufactured using Atmel’s high density non-volatile memory technology. The On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The Boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega164A is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The ATmega164A is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. Atmel ATmega164A [DATASHEET] 5 Atmel-42712C-ATmega164A_Datasheet_Summary-10/2016 Document Outline Introduction Feature Table of Contents 1. Description 2. Configuration Summary 3. Ordering Information 4. Block Diagram 5. Pin Configurations 5.1. Pinout 5.1.1. PDIP 5.1.2. TQFN and QFN 5.1.3. DRQFN 5.1.4. VFBGA 5.2. Pin Descriptions 5.2.1. VCC 5.2.2. GND 5.2.3. Port A (PA[7:0]) 5.2.4. Port B (PB[7:0]) 5.2.5. Port C (PC[7:0]) 5.2.6. Port D (PD[7:0]) 5.2.7. RESET 5.2.8. XTAL1 5.2.9. XTAL2 5.2.10. AVCC 5.2.11. AREF 6. I/O Multiplexing 7. General Information 7.1. Resources 7.2. Data Retention 7.3. About Code Examples 7.4. Capacitive Touch Sensing 7.4.1. QTouch Library 8. Packaging Information 8.1. 40-pin PDIP 8.2. 44-pin TQFP 8.3. 44-pin VQFN 8.4. 44-pin QFN 8.5. 49-pin VFBGA