Datasheet LTC1775 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | High Power No RSENSE Current Mode Synchronous Step-Down Switching Regulator |
| 页数 / 页 | 24 / 6 — PI FU CTIO S. EXTV. CC (Pin 1):. SYNC (Pin 2):. PGND (Pin 9):. BG (Pin … |
| 文件格式/大小 | PDF / 307 Kb |
| 文件语言 | 英语 |
PI FU CTIO S. EXTV. CC (Pin 1):. SYNC (Pin 2):. PGND (Pin 9):. BG (Pin 10):. RUN/SS (Pin 3):. INTVCC (Pin 11):. FCB (Pin 4):
该数据表的模型线
文件文字版本
LTC1775
U U U PI FU CTIO S EXTV
Leaving V
CC (Pin 1):
INTVCC Switch Input. When the EXTVCC PROG open allows the output voltage to be set by voltage is above 4.7V, the switch closes and supplies an external resistive divider between the output and INTV V CC power from EXTVCC. Do not exceed 7V at this pin. OSENSE.
SYNC (Pin 2):
Synchronization Input for Internal Oscilla-
PGND (Pin 9):
Driver Power Ground. Connects to the tor. The oscillator will nominally run at 150kHz when open, source of the bottom N-channel MOSFET, the (–) terminal 225kHz when tied above 1.2V, and will lock over a 1.5:1 of CVCC and the (–) terminal of CIN. clock frequency range.
BG (Pin 10):
Bottom Gate Drive. Drives the gate of the
RUN/SS (Pin 3):
Run Control and Soft Start Input. A bottom N-channel MOSFET between ground and INTVCC. capacitor to ground at this pin sets the ramp time to full
INTVCC (Pin 11):
Internal 5.2V Regulator Output. The current output (approximately 1s/µF). Forcing this pin driver and control circuits are powered from this voltage. below 1.4V shuts down the device. Decouple this pin to power ground with a minimum of
FCB (Pin 4):
Forced Continuous Input. Tie this pin to 4.7µF tantalum or other low ESR capacitor. ground to force synchronous operation at low load
BOOST (Pin 12):
Topside Floating Driver Supply. The (+) currents, to a resistive divider from the secondary output terminal of the bootstrap capacitor connects here. This pin when using a secondary winding, or to INTVCC to enable swings from a Schottky diode drop below INTVCC to VIN + Burst Mode operation at low load currents. INTVCC.
ITH (Pin 5):
Error Amplifier Compensation Point. The
TG (Pin 13):
Top Gate Drive. Drives the top N-channel current comparator threshold increases with this control MOSFET with a voltage swing equal to INTVCC superim- voltage, forcing inductor current to be roughly propor- posed on the switch node voltage. tional to VITH. Nominal voltage range for this pin is 0V to 2.4V.
SW (Pin 14):
Switch Node. The (–) terminal of the boot- strap capacitor connects here. This pin swings from a
SGND (Pin 6):
Signal Ground. Connect to the (–) terminal diode drop below ground up to VIN. of COUT.
TK (Pin 15):
Top MOSFET Kelvin Sense. MOSFET VDS
VOSENSE (Pin 7):
Output Voltage Sense. Feedback input sensing requires this pin to be routed to the drain of the top from the remotely sensed output voltage or from an MOSFET separately from VIN. external resistive divider across the output.
VIN (Pin 16):
Main Supply Input. Decouple this pin to
VPROG (Pin 8):
Output Voltage Programming. When ground with an RC filter (1Ω, 0.1µF) for applications VOSENSE is connected to the output, VPROG < 0.8V selects above 3A. a 3.3V output and VPROG > 3.5V selects a 5V output. 6
U U U PI FU CTIO S EXTV
Leaving V
CC (Pin 1):
INTVCC Switch Input. When the EXTVCC PROG open allows the output voltage to be set by voltage is above 4.7V, the switch closes and supplies an external resistive divider between the output and INTV V CC power from EXTVCC. Do not exceed 7V at this pin. OSENSE.
SYNC (Pin 2):
Synchronization Input for Internal Oscilla-
PGND (Pin 9):
Driver Power Ground. Connects to the tor. The oscillator will nominally run at 150kHz when open, source of the bottom N-channel MOSFET, the (–) terminal 225kHz when tied above 1.2V, and will lock over a 1.5:1 of CVCC and the (–) terminal of CIN. clock frequency range.
BG (Pin 10):
Bottom Gate Drive. Drives the gate of the
RUN/SS (Pin 3):
Run Control and Soft Start Input. A bottom N-channel MOSFET between ground and INTVCC. capacitor to ground at this pin sets the ramp time to full
INTVCC (Pin 11):
Internal 5.2V Regulator Output. The current output (approximately 1s/µF). Forcing this pin driver and control circuits are powered from this voltage. below 1.4V shuts down the device. Decouple this pin to power ground with a minimum of
FCB (Pin 4):
Forced Continuous Input. Tie this pin to 4.7µF tantalum or other low ESR capacitor. ground to force synchronous operation at low load
BOOST (Pin 12):
Topside Floating Driver Supply. The (+) currents, to a resistive divider from the secondary output terminal of the bootstrap capacitor connects here. This pin when using a secondary winding, or to INTVCC to enable swings from a Schottky diode drop below INTVCC to VIN + Burst Mode operation at low load currents. INTVCC.
ITH (Pin 5):
Error Amplifier Compensation Point. The
TG (Pin 13):
Top Gate Drive. Drives the top N-channel current comparator threshold increases with this control MOSFET with a voltage swing equal to INTVCC superim- voltage, forcing inductor current to be roughly propor- posed on the switch node voltage. tional to VITH. Nominal voltage range for this pin is 0V to 2.4V.
SW (Pin 14):
Switch Node. The (–) terminal of the boot- strap capacitor connects here. This pin swings from a
SGND (Pin 6):
Signal Ground. Connect to the (–) terminal diode drop below ground up to VIN. of COUT.
TK (Pin 15):
Top MOSFET Kelvin Sense. MOSFET VDS
VOSENSE (Pin 7):
Output Voltage Sense. Feedback input sensing requires this pin to be routed to the drain of the top from the remotely sensed output voltage or from an MOSFET separately from VIN. external resistive divider across the output.
VIN (Pin 16):
Main Supply Input. Decouple this pin to
VPROG (Pin 8):
Output Voltage Programming. When ground with an RC filter (1Ω, 0.1µF) for applications VOSENSE is connected to the output, VPROG < 0.8V selects above 3A. a 3.3V output and VPROG > 3.5V selects a 5V output. 6