Datasheet LT3463, LT3463A (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Dual Micropower DC/DC Converters with Schottky Diodes |
| 页数 / 页 | 8 / 7 — TYPICAL APPLICATIO. Dual Output. 20V Converter. PACKAGE DESCRIPTIO. DD … |
| 文件格式/大小 | PDF / 198 Kb |
| 文件语言 | 英语 |
TYPICAL APPLICATIO. Dual Output. 20V Converter. PACKAGE DESCRIPTIO. DD Package. 10-Lead Plastic DFN (3mm. 3mm). RECOMMENDED
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文件文字版本
LT3463/LT3463A
U TYPICAL APPLICATIO Dual Output
±
20V Converter
L1 10 V µH V IN OUT1 2.7V 20V TO 5V C1 R2 9mA 1µF 1M 3 2 1 C2 V 0.47µF IN SW1 VOUT1 R1 9 10 66.5k SHDN1 FB1 LT3463 7 VREF 8 6 R3 SHDN2 FB2 61.9k GND SW2 D2 11 4 5 R4 C4 1M L2 0.1µF D1 10µH VOUT2 –20V 9mA C3 0.47µF 3463 TA02
U PACKAGE DESCRIPTIO DD Package 10-Lead Plastic DFN (3mm
×
3mm)
(Reference LTC DWG # 05-08-1699) R = 0.115 0.38 ± 0.10 TYP 6 10 0.675 ±0.05 3.50 ±0.05 1.65 ±0.05 3.00 ±0.10 1.65 ± 0.10 2.15 ±0.05 (2 SIDES) (4 SIDES) (2 SIDES) PIN 1 PACKAGE TOP MARK OUTLINE (SEE NOTE 6) (DD10) DFN 1103 5 1 0.25 ± 0.05 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 0.50 BSC BSC 2.38 ±0.10 (2 SIDES) 2.38 ±0.05 0.00 – 0.05 (2 SIDES) BOTTOM VIEW—EXPOSED PAD
RECOMMENDED
SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). 5. EXPOSED PAD SHALL BE SOLDER PLATED CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE 2. DRAWING NOT TO SCALE TOP AND BOTTOM OF PACKAGE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 3463f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7
U TYPICAL APPLICATIO Dual Output
±
20V Converter
L1 10 V µH V IN OUT1 2.7V 20V TO 5V C1 R2 9mA 1µF 1M 3 2 1 C2 V 0.47µF IN SW1 VOUT1 R1 9 10 66.5k SHDN1 FB1 LT3463 7 VREF 8 6 R3 SHDN2 FB2 61.9k GND SW2 D2 11 4 5 R4 C4 1M L2 0.1µF D1 10µH VOUT2 –20V 9mA C3 0.47µF 3463 TA02
U PACKAGE DESCRIPTIO DD Package 10-Lead Plastic DFN (3mm
×
3mm)
(Reference LTC DWG # 05-08-1699) R = 0.115 0.38 ± 0.10 TYP 6 10 0.675 ±0.05 3.50 ±0.05 1.65 ±0.05 3.00 ±0.10 1.65 ± 0.10 2.15 ±0.05 (2 SIDES) (4 SIDES) (2 SIDES) PIN 1 PACKAGE TOP MARK OUTLINE (SEE NOTE 6) (DD10) DFN 1103 5 1 0.25 ± 0.05 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 0.50 BSC BSC 2.38 ±0.10 (2 SIDES) 2.38 ±0.05 0.00 – 0.05 (2 SIDES) BOTTOM VIEW—EXPOSED PAD
RECOMMENDED
SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). 5. EXPOSED PAD SHALL BE SOLDER PLATED CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE 2. DRAWING NOT TO SCALE TOP AND BOTTOM OF PACKAGE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 3463f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7