Datasheet LTC2461, LTC2463 (Analog Devices) - 4

制造商Analog Devices
描述Differential Ultra-Tiny, 16-Bit I2C ΔΣ ADCs with 10ppm/°C Max Precision Reference
页数 / 页20 / 4 — I2C INPUTS AND OUTPUTS The. denotes the specifications which apply over …
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I2C INPUTS AND OUTPUTS The. denotes the specifications which apply over the full operating temperature

I2C INPUTS AND OUTPUTS The denotes the specifications which apply over the full operating temperature

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LTC2461/LTC2463
I2C INPUTS AND OUTPUTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 2, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l 0.7VCC V VIL Low Level Input Voltage l 0.3VCC V II Digital Input Current l –10 10 µA VHYS Hysteresis of Schmidt Trigger Inputs (Note 3) l 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA l 0.4 V IIN Input Leakage 0.1VCC ≤ VIN ≤ 0.9VCC l 1 µA CI Capacitance for Each I/O Pin l 10 pF CB Capacitance Load for Each Bus Line l 400 pF VIH(A0) High Level Input Voltage for Address Pin l 0.95VCC V VIL(A0) Low Level Input Voltage for Address Pin l 0.05VCC V
I2C TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 2, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tCONV Conversion Time l 13 16.6 23 ms fSCL SCL Clock Frequency l 0 400 kHz tHD(SDA,STA) Hold Time (Repeated) START Condition l 0.6 ms tLOW LOW Period of the SCL Pin l 1.3 ms tHIGH HIGH Period of the SCL Pin l 0.6 ms tSU(STA) Set-Up Time for a Repeated START Condition l 0.6 ms tHD(DAT) Data Hold Time l 0 0.9 ms tSU(DAT) Data Set-Up Time l 100 ns tr Rise Time for SDA, SCL Signals (Note 6) l 20 + 0.1CB 300 ns tf Fall Time for SDA, SCL Signals (Note 6) l 20 + 0.1CB 300 ns tSU(STO) Set-Up Time for STOP Condition l 0.6 ms tBUF Bus Free Time Between a Stop and Start Condition l 1.3 ms tOF Output Fall Time VIHMIN to VILMAX Bus Load CB = 10pF to l 20 + 0.1CB 250 ns 400pF (Note 6) tSP Input Spike Suppression l 50 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
Input sampling current is the average input current drawn from may cause permanent damage to the device. Exposure to any Absolute the input sampling network while the LTC2461/LTC2463 are converting. Maximum Rating condition for extended periods may affect device
Note 6:
CB = capacitance of one bus line in pF. reliability and lifetime.
Note 7:
All values refer to VIH(MIN) and VIL(MAX) levels.
Note 2:
All voltage values are with respect to GND. VCC = 2.7V to 5.5V
Note 8:
A positive current is flowing into the DUT pin. unless otherwise specified.
Note 9:
Voltage temperature coefficient is calculated by dividing the
Note 3:
Guaranteed by design, not subject to test. maximum change in output voltage by the specified temperature range.
Note 4:
Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. Guaranteed by design and test correlation. 24613fa 4 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Applications Information Package Description Electrical Characteristics Analog Inputs Power Requirements I2c Inputs and Outputs I2c Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Revision History Typical Application Related Parts