Datasheet LTC2355-12, LTC2355-14 (Analog Devices)

制造商Analog Devices
描述Serial 12-Bit, 3.5Msps Sampling ADCs with Shutdown
页数 / 页18 / 1 — FEATURES. DESCRIPTION. 3.5Msps Conversion Rate. 74.2dB SINAD at 14-Bits, …
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FEATURES. DESCRIPTION. 3.5Msps Conversion Rate. 74.2dB SINAD at 14-Bits, 71.1dB SINAD at 12-Bits. Low Power Dissipation: 18mW

Datasheet LTC2355-12, LTC2355-14 Analog Devices

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LTC2355-12/LTC2355-14 Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown
FEATURES DESCRIPTION
n
3.5Msps Conversion Rate
The LTC®2355-12/LTC2355-14 are 12-bit/14-bit, 3.5Msps n
74.2dB SINAD at 14-Bits, 71.1dB SINAD at 12-Bits
serial ADCs with differential inputs. The devices draw n
Low Power Dissipation: 18mW
only 5.5mA from a single 3.3V supply and come in a n
3.3V Single Supply Operation
tiny 10-lead MSOP package. A Sleep shutdown feature n 2.5V Internal Bandgap Reference can be Overdriven further reduces power consumption to 13µW. The com- n 3-Wire SPI-Compatible Serial Interface bination of speed, low power and tiny package makes the n Sleep (13µW) Shutdown Mode LTC2355-12/LTC2355-14 suitable for high speed, portable n Nap (4mW) Shutdown Mode applications. n 80dB Common Mode Rejection The 80dB common mode rejection allows users to eliminate n 0V to 2.5V Unipolar Input Range ground loops and common mode noise by measuring n Tiny 10-Lead MSOP Package signals differentially from the source.
APPLICATIONS
The devices convert 0V to 2.5V unipolar inputs differentially. The absolute voltage swing for A + – IN and AIN extends from n Communications ground to the supply voltage. n Data Acquisition Systems The serial interface sends out the conversion results during n Uninterrupted Power Supplies the 16 clock cycles following a CONV rising edge for com- n Multiphase Motor Control patibility with standard serial interfaces. If two additional n Multiplexed Data Acquisition clock cycles for acquisition time are allowed after the data n RFID stream in between conversions, the full sampling rate of L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and 3.5Msps can be achieved with a 63MHz clock. SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.
BLOCK DIAGRAM
10µF 3.3V
THD, 2nd, 3rd and SFDR vs Input Frequency
–50 7 LTC2355-14 VDD –56 –62 A + IN 1 + THREE- TCH THD STATE –68 S & H 14-BIT ADC SERIAL 8 SDO 2nd –74 A – OUTPUT 3rd IN 2 – 14-BIT LA PORT –80 14 –86 VREF THD, 2nd, 3rd (dB) –92 3 10 CONV 10µF 2.5V TIMING –98 REFERENCE LOGIC GND –104 4 9 SCK –110 2355 TA01 5 6 11 0.1 1 10 100 EXPOSED PAD FREQUENCY (MHz) 2355 G02 2355fb For more information www.linear.com/LTC2355-12 1 Document Outline Features Description Applications Block Diagram Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts