Datasheet LTC2294 (Analog Devices)

制造商Analog Devices
描述Dual 12-Bit, 80Msps Low Power 3V ADC
页数 / 页24 / 1 — FEATURES. DESCRIPTIO. Integrated Dual 12-Bit ADCs. Sample Rate: 80Msps. …
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FEATURES. DESCRIPTIO. Integrated Dual 12-Bit ADCs. Sample Rate: 80Msps. Single 3V Supply (2.7V to 3.4V). Low Power: 422mW

Datasheet LTC2294 Analog Devices

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LTC2294 Dual 12-Bit, 80Msps Low Power 3V ADC
U FEATURES DESCRIPTIO

Integrated Dual 12-Bit ADCs
The LTC®2294 is a 12-bit 80Msps, low power dual 3V ■
Sample Rate: 80Msps
A/D converter designed for digitizing high frequency, wide ■
Single 3V Supply (2.7V to 3.4V)
dynamic range signals. The LTC2294 is perfect for ■
Low Power: 422mW
demanding imaging and communications applications ■
70.6dB SNR at 70MHz Input
with AC performance that includes 70.6dB SNR and 90dB ■
90dB SFDR at 70MHz Input
SFDR for signals well beyond the Nyquist frequency. ■ 110dB Channel Isolation at 100MHz DC specs include ±0.4LSB INL (typ), ±0.2LSB DNL (typ) ■ Multiplexed or Separate Data Bus and no missing codes over temperature. The transition ■ Flexible Input: 1VP-P to 2VP-P Range noise is a low 0.3LSB ■ 575MHz Full Power Bandwidth S/H RMS. ■ Clock Duty Cycle Stabilizer A single 3V supply allows low power operation. A separate ■ Shutdown and Nap Modes output supply allows the outputs to drive 0.5V to 3.6V ■ Pin Compatible Family logic. An optional multiplexer allows both channels to 105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit) share a digital output bus. 80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit) A single-ended CLK input controls converter operation. An 65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit) optional clock duty cycle stabilizer allows high perfor- 40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit) mance at full speed for a wide range of clock duty cycles. 25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit) , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit) ■ 64-Pin (9mm × 9mm) QFN Package
U APPLICATIO S
■ Wireless and Wired Broadband Communication ■ Imaging Systems ■ Spectral Analysis ■ Portable Instrumentation
U TYPICAL APPLICATIO SNR vs Input Frequency, –1dB, 2V Range
+ OVDD 12-BIT ANALOG INPUT 75 PIPELINED D11A INPUT A S/H OUTPUT • ADC CORE • – DRIVERS • 74 D0A 73 OGND 72 71 CLK A CLOCK/DUTY CYCLE 70 CONTROL 69 MUX SNR (dBFS) 68 CLK B CLOCK/DUTY CYCLE CONTROL 67 66 OVDD 65 0 50 100 150 200 D11B + OUTPUT • INPUT FREQUENCY (MHz) 12-BIT • ANALOG • INPUT DRIVERS PIPELINED 2294 TA02 INPUT B D0B S/H ADC CORE – OGND 2294 TA01 2294fa 1