Datasheet LTC1408-12 (Analog Devices) - 19
| 制造商 | Analog Devices |
| 描述 | 6 Channel, 12-Bit, 600ksps Simultaneous Sampling ADC with Shutdown |
| 页数 / 页 | 20 / 19 — PACKAGE DESCRIPTIO. UH Package. 32-Lead Plastic QFN (5mm x 5mm) |
| 文件格式/大小 | PDF / 282 Kb |
| 文件语言 | 英语 |
PACKAGE DESCRIPTIO. UH Package. 32-Lead Plastic QFN (5mm x 5mm)
该数据表的模型线
文件文字版本
LTC1408-12
U PACKAGE DESCRIPTIO UH Package 32-Lead Plastic QFN (5mm x 5mm)
(Reference LTC DWG # 05-08-1693) 0.70 ±0.05 5.50 ±0.05 4.10 ±0.05 3.45 ± 0.05 3.50 REF (4 SIDES) 3.45 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED BOTTOM VIEW—EXPOSED PAD PIN 1 NOTCH R = 0.30 TYP R = 0.05 5.00 ± 0.10 0.75 ± 0.05 R = 0.115 OR 0.35 × 45° CHAMFER TYP TYP (4 SIDES) 31 32 0.00 – 0.05 0.40 ± 0.10 PIN 1 TOP MARK (NOTE 6) 1 2 3.45 ± 0.10 3.50 REF (4-SIDES) 3.45 ± 0.10 (UH32) QFN 0406 REV D 0.200 REF 0.25 ± 0.05 0.50 BSC NOTE: 1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE M0-220 VARIATION WHHD-(X) (TO BE APPROVED) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 140812f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19
U PACKAGE DESCRIPTIO UH Package 32-Lead Plastic QFN (5mm x 5mm)
(Reference LTC DWG # 05-08-1693) 0.70 ±0.05 5.50 ±0.05 4.10 ±0.05 3.45 ± 0.05 3.50 REF (4 SIDES) 3.45 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED BOTTOM VIEW—EXPOSED PAD PIN 1 NOTCH R = 0.30 TYP R = 0.05 5.00 ± 0.10 0.75 ± 0.05 R = 0.115 OR 0.35 × 45° CHAMFER TYP TYP (4 SIDES) 31 32 0.00 – 0.05 0.40 ± 0.10 PIN 1 TOP MARK (NOTE 6) 1 2 3.45 ± 0.10 3.50 REF (4-SIDES) 3.45 ± 0.10 (UH32) QFN 0406 REV D 0.200 REF 0.25 ± 0.05 0.50 BSC NOTE: 1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE M0-220 VARIATION WHHD-(X) (TO BE APPROVED) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 140812f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19